TLC5510, TLC5510A
8-BIT HIGH-SPEED ANALOG-TO-DIGITAL CONVERTERS
SLAS095L – SEPTEMBER 1994 – REVISED JUNE 2003
functional block diagram
Resistor
Reference
Divider
REFB
270
Ω
NOM
REFT
REFBS
80
Ω
NOM
AGND
AGND
VDDA
320
Ω
NOM
REFTS
ANALOG IN
Clock
Generator
Upper Sampling
Comparators
(4-Bit)
Upper Encoder
(4-Bit)
Upper Data
Latch
Lower Sampling
Comparators
(4-Bit)
Lower Encoder
(4-Bit)
D5
D6
D7
D8(MSB)
Lower Sampling
Comparators
(4-Bit)
Lower Encoder
(4-Bit)
Lower Data
Latch
D1(LSB)
D2
D3
D4
OE
CLK
schematics of inputs and outputs
EQUIVALENT OF ANALOG INPUT
VDDA
EQUIVALENT OF EACH DIGITAL INPUT
VDDD
EQUIVALENT OF EACH DIGITAL OUTPUT
VDDD
ANALOG IN
OE, CLK
D1 – D8
AGND
DGND
DGND
2
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