TL5001, TL5001A
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
SLVS084F – APRIL 1994 – REVISED JANUARY 2002
dead-time control (DTC) (continued)
R
DT
+
Rt
)
1250
D V oscmax – V oscmin
)
Voscmin
Where
R
DT
and R
t
are in ohms, D in decimal
Soft start can be implemented by paralleling the DTC resistor with a capacitor (C
DT
) as shown in Figure 2. During
soft start, the voltage at DTC is derived by the following equation:
V
[
IDTRDT
DT
1– e
–t R
C
DT DT
6 DTC
CDT
RDT
TL5001/A
Figure 2. Soft-Start Circuit
If the dc-to-dc converter must be in regulation within a specified period of time, the time constant, R
DT
C
DT
, should
be t
0
/3 to t
0
/5. The TL5001/A remains off until V
DT
≈
0.7 V, the minimum ramp value. C
DT
is discharged every time
UVLO or SCP becomes active.
undervoltage-lockout (UVLO) protection
The undervoltage-lockout circuit turns the output transistor off and resets the SCP latch whenever the supply voltage
drops too low (approximately 3 V at 25°C) for proper operation. A hysteresis voltage of 200 mV eliminates false
triggering on noise and chattering.
short-circuit protection (SCP)
The TL5001/A includes short-circuit protection (see Figure 3), which turns the power switch off to prevent damage
when the converter output is shorted. When activated, the SCP prevents the switch from being turned on until the
internal latching circuit is reset. The circuit is reset by reducing the input voltage until UVLO becomes active or until
the SCP terminal is pulled to ground externally.
When a short circuit occurs, the error-amplifier output at COMP rises to increase the power-switch duty cycle in an
attempt to maintain the output voltage. SCP comparator 1 starts an RC timing circuit when COMP exceeds 1.5 V.
If the short is removed and the error-amplifier output drops below 1.5 V before time out, normal converter operation
continues. If the fault is still present at the end of the time-out period, the timer sets the latching circuit and turns
off the TL5001/A output transistor.
4
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