TAS5715
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SLOS645 –AUGUST 2010
Table 24. Bank Switching Command (continued)
D7
0
D6
D5
D4
D3
D2
D1
D0
FUNCTION
EQ ON
1
–
0
–
–
–
0
1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
EQ OFF (bypass BQ 0–7 of channels 1 and 2)
(2)
–
Reserved
(2)
–
Ignore bank-mapping in bits D31–D8.Use default mapping.
Use bank-mapping in bits D31–D8.
(2) (3)
–
–
–
–
0
–
–
–
–
–
–
–
–
L and R can be written independently.
L and R are ganged for EQ biquads; a write to the left-channel
biquad is also written to the right-channel biquad. (0x29–0x2F is
ganged to 0x30–0x36. Also, 0x58–0x5B is ganged to 0x5C–0x5F.
–
1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
0
1
–
–
–
–
–
–
–
–
–
0
0
0
0
1
1
1
–
–
0
0
1
1
0
0
1
–
–
0
1
0
1
0
1
X
Enable DRC time constant filter banking
Disable DRC time constantfilter banking
(2)
No bank switching. All updates to DAP
Configure bank 1 (32 kHz by default)
Configure bank 2 (44.1/48 kHz by default)
Configure bank 3 (other sample rates by default)
Automatic bank selection
Reserved
Reserved
(2) Default values are in bold.
(3) Biquad ganging reduces the number of I2C transactions. This is very useful if the left and right PEQ biquads have the same coefficients.
If ganging is ON (D4 = 1), then any write to left biquad is automatically copied to the corresponding right biquad.
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