TAS5715
SLOS645 –AUGUST 2010
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BANK SWITCHING
The TAS5715 uses an approach called bank switching together with automatic sample-rate detection. All
processing features that must be changed for different sample rates are stored internally in three banks. The
user can program which sample rates map to each bank. By default, bank 1 is used in 32-kHz mode, bank 2 is
used in 44.1/48-kHz mode, and bank 3 is used for all other rates. Combined with the clock-rate autodetection
feature, bank switching allows the TAS5715 to detect automatically a change in the input sample rate and switch
to the appropriate bank without any MCU intervention.
An external controller configures bankable locations (0x29–0x36, 0x3A–0x3F, and 0x59,0x5D) for all three banks
during the initialization sequence.
If automatic bank switching is enabled (register 0x50, bits 2:0) , then the TAS5715 automatically swaps the
coefficients for subsequent sample rate changes, avoiding the need for any external controller intervention for a
sample-rate change.
By default, bits 2:0 have the value 000; indicating that bank switching is disabled. In that state, updates to
bankable locations take immediate effect. A write to register 0x50 with bits 2:0 being 001, 010, or 011 brings the
system into the coefficient-bank-update state update bank1, update bank2, or update bank3, respectively. Any
subsequent write to bankable locations updates the coefficient banks stored outside the DAP. After updating all
the three banks, the system controller should issue a write to register 0x50 with bits 2:0 being 100; this changes
the system state to automatic bank-switching mode. In automatic bank-switching mode, the TAS5715
automatically swaps banks based on the sample rate.
Command sequences for updating DAP coefficients can be summarized as follows:
1. Bank switching disabled (default): DAP coefficient writes take immediate effect and are not
influenced by subsequent sample rate changes.
OR
Bank switching enabled:
(a) Update bank-1 mode: Write 001 to bits 2:0 of reg 0x50. Load the 32-kHz coefficients.
(b) Update bank-2 mode: Write 010 to bits 2:0 of reg 0x50. Load the 48-kHz coefficients.
(c) Update bank-3 mode: Write 011 to bits 2:0 of reg 0x50. Load the other coefficients.
(d) Enable automatic bank switching by writing 100 to bits 2:0 of reg 0x50.
26-Bit 3.23 Number Format
All mixer gain coefficients are 26-bit coefficients using a 3.23 number format. Numbers formatted as 3.23
numbers means that there are 3 bits to the left of the binary point and 23 bits to the right of the binary point. This
is shown in Figure 52 .
2–23 Bit
2–5 Bit
2–1 Bit
20 Bit
21 Bit
Sign Bit
S_xx.xxxx_xxxx_xxxx_xxxx_xxxx_xxx
M0125-01
Figure 52. 3.23 Format
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