TAS5727
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SLOS670 –NOVEMBER 2010
PLL INPUT PARAMETERS AND EXTERNAL FILTER COMPONENTS
PARAMETER
TEST CONDITIONS
MIN
2.8224
40%
TYP
MAX
24.576
60%
UNIT
fMCLKI
MCLK frequency
MHz
MCLK duty cycle
50%
tr /
tf(MCLK)
Rise/fall time for MCLK
5
4
ns
LRCLK allowable drift before LRCLK reset
External PLL filter capacitor C1
External PLL filter capacitor C2
External PLL filter resistor R
MCLKs
nF
SMD 0603 X7R
47
4.7
SMD 0603 X7R
nF
SMD 0603, metal film
470
Ω
ELECTRICAL CHARACTERISTICS
DC Characteristics
TA = 25°, PVCC_x = 18 V, DVDD = AVDD = 3.3 V, RL= 8 Ω, BTL AD mode, fS = 48 kHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
IOH = –4 mA
DVDD = 3 V
VOH
VOL
IIL
High-level output voltage
A_SEL_FAULT and SDA
A_SEL_FAULT and SDA
2.4
V
IOL = 4 mA
DVDD = 3 V
Low-level output voltage
Low-level input current
High-level input current
0.5
75
V
VI < VIL ; DVDD = AVDD
= 3.6V
mA
mA
VI > VIH ; DVDD =
AVDD = 3.6V
IIH
75(1)
68
38
50
8
Normal mode
49
23
32
3
3.3 V supply voltage (DVDD,
AVDD)
IDD
3.3 V supply current
Supply current
mA
Reset (RESET = low,
PDN = high)
Normal mode
IPVDD
No load (PVDD_x)
mA
Reset (RESET = low,
PDN = high)
Drain-to-source resistance, LS TJ = 25°C, includes metallization resistance
Drain-to-source resistance, HS TJ = 25°C, includes metallization resistance
75
75
(2)
rDS(on)
mΩ
I/O Protection
Vuvp
Undervoltage protection limit
PVDD falling
PVDD rising
7.2
7.6
V
V
Vuvp,hyst
OTE(3)
Undervoltage protection limit
Overtemperature error
150
°C
Extra temperature drop
required to recover from error
(3)
OTEHYST
30
°C
IOC
Overcurrent limit protection
Overcurrent response time
4.5
A
IOCT
150
ns
Internal pulldown resistor at the Connected when drivers are in the high-impedance state
output of each half-bridge to provide bootstrap capacitor charge.
RPD
3
kΩ
(1) IIH for the PBTL pin has a maximum limit of 200 µA due to an internal pulldown on the pin.
(2) This does not include bond-wire or pin resistance.
(3) Specified by design
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