TAS5705
SLOS549–JUNE 2008...................................................................................................................................................................................................... www.ti.com
Single-Byte Read
As shown in Figure 40, a single-byte data-read transfer begins with the master device transmitting a start
condition followed by the I2C device address and the read/write bit. For the data-read transfer, both a write
followed by a read are actually done. Initially, a write is done to transfer the address byte or bytes of the internal
memory address to be read. As a result, the read/write bit becomes a 0. After receiving the TAS5705 address
and the read/write bit, TAS5705 responds with an acknowledge bit. In addition, after sending the internal memory
address byte or bytes, the master device transmits another start condition followed by the TAS5705 address and
the read/write bit again. This time the read/write bit becomes a 1, indicating a read transfer. After receiving the
address and the read/write bit, the TAS5705 again responds with an acknowledge bit. Next, the TAS5705
transmits the data byte from the memory address being read. After receiving the data byte, the master device
transmits a not-acknowledge followed by a stop condition to complete the single-byte data-read transfer.
Repeat Start
Condition
Not
Acknowledge
Start
Condition
Acknowledge
Acknowledge
A0 ACK
Acknowledge
A6 A5
A1 A0 R/W ACK A7 A6 A5 A4
A6 A5
A1 A0 R/W ACK D7 D6
D1 D0 ACK
I2C Device Address and
Read/Write Bit
Subaddress
I2C Device Address and
Read/Write Bit
Data Byte
Stop
Condition
T0036-03
Figure 40. Single-Byte Read Transfer
Multiple-Byte Read
A multiple-byte data-read transfer is identical to a single-byte data read transfer except that multiple data bytes
are transmitted by the TAS5705 to the master device as shown in Figure 41. Except for the last data byte, the
master device responds with an acknowledge bit after receiving each data byte.
Repeat Start
Condition
Not
Acknowledge
Start
Condition
Acknowledge
Acknowledge
Acknowledge
Acknowledge
Acknowledge
D0 ACK D7
A6
A0 R/W ACK A7 A6 A5
A0 ACK
A6
A0 R/W ACK D7
D0 ACK D7
D0 ACK
I2C Device Address and
Read/Write Bit
Subaddress
I2C Device Address and First Data Byte
Read/Write Bit
Other Data Bytes
Last Data Byte
Stop
Condition
T0036-04
Figure 41. Multiple-Byte Read Transfer
34
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TAS5705
TI [ TEXAS INSTRUMENTS ]
