SN75LVDS179, SN75LVDS180, SN75LVDS050, SN75LVDS051
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SLLS361A – JUNE 1999 – REVISED MARCH 2000
PARAMETER MEASUREMENT INFORMATION
driver (continued)
Driver Enable
Y
100 Ω
±1%
V
OD
Input
Z
C
= 10 pF
L
(2 Places)
2 V
Input
1.4 V
0.8 V
t
PHL
t
PLH
100%
80%
V
OD(H)
Output
0 V
V
OD(L)
20%
0%
t
f
t
r
NOTE A: All input pulses are supplied by a generator having the following characteristics: t or t ≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps,
r
f
pulse width = 10 ± 0.2 ns . C includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.
L
Figure 2. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal
Driver Enable
Input
49.9 Ω, ±1% (2 Places)
3 V
0 V
Y
Z
V
OC
V
OC(PP)
C
= 10 pF
L
V
OC(SS)
(2 Places)
V
OC
NOTE A: All input pulses are supplied by a generator having the following characteristics: t or t ≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps,
r
f
pulsewidth=10±0.2ns.C includesinstrumentationandfixturecapacitancewithin0,06mmoftheD.U.T.ThemeasurementofV
is made on test equipment with a –3 dB bandwidth of at least 300 MHz.
L
OC(PP)
Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265