SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D – JULY 1985 – REVISED APRIL 2003
PARAMETER MEASUREMENT INFORMATION
Output
S1
0 V or 3 V
CL = 50 pF
(see Note A)
Generator
(see Note B)
50
Ω
RL = 110
Ω
tPZH
Output
2.3 V
tPHZ
VOLTAGE WAVEFORMS
0.5 V
VOH
Voff
≈0
V
Input
1.5 V
1.5 V
0V
3V
TEST CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
≤
1 MHz, 50% duty cycle, tr
≤
6 ns, tf
≤
6 ns,
ZO = 50
Ω.
Figure 4. Driver Test Circuit and Voltage Waveforms
5V
RL = 110
Ω
Output
tPZL
tPLZ
5V
0.5 V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
3V
Input
1.5 V
1.5 V
0V
S1
3 V or 0 V
CL = 50 pF
(see Note A)
Generator
(see Note B)
50
Ω
Output
2.3 V
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
≤
1 MHz, 50% duty cycle, tr
≤
6 ns, tf
≤
6 ns,
ZO = 50
Ω.
Figure 5. Driver Test Circuit and Voltage Waveforms
3V
Input
Generator
(see Note B)
51
Ω
1.5 V
Output
CL = 15 pF
(see Note A)
tPLH
Output
tPHL
VOH
1.3 V
1.3 V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
1.5 V
1.5 V
0V
0V
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
≤
1 MHz, 50% duty cycle, tr
≤
6 ns, tf
≤
6 ns,
ZO = 50
Ω.
Figure 6. Receiver Test Circuit and Voltage Waveforms
8
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