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SN74LVC1G08DBVRG4 参数 Datasheet PDF下载

SN74LVC1G08DBVRG4图片预览
型号: SN74LVC1G08DBVRG4
PDF下载: 下载PDF文件 查看货源
内容描述: 单路2输入正与门 [SINGLE 2-INPUT POSITIVE-AND GATE]
分类和应用: 栅极逻辑集成电路光电二极管输入元件
文件页数/大小: 16 页 / 434 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN74LVC1G08
SINGLE 2 INPUT POSITIVE AND GATE
SCES217S − APRIL 1999 − REVISED JUNE 2005
D
Available in the Texas Instruments
D
D
D
D
D
NanoStar and NanoFree Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 3.6 ns at 3.3 V
Low Power Consumption, 10-µA Max I
CC
±24-mA
Output Drive at 3.3 V
DBV PACKAGE
(TOP VIEW)
D
I
off
Supports Partial-Power-Down Mode
D
D
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
DRL PACKAGE
(TOP VIEW)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
A
B
GND
1
5
V
CC
A
B
1
2
3
5
V
CC
A
B
GND
1
2
3
5
V
CC
Y
GND
B
A
3 4
2
1 5
Y
V
CC
2
4
GND
4
4
Y
3
Y
See mechanical drawings for dimensions.
description/ordering information
The SN74LVC1G08 performs the Boolean function Y
+
A
B or Y
+
A
)
B in positive logic.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Reel of 3000
SOT (SOT-23) − DBV
SOT (SC-70) − DCK
SOT (SOT-553) − DRL
Reel of 250
Reel of 3000
Reel of 250
Reel of 4000
Reel of 3000
SN74LVC1G08YEPR
SN74LVC1G08YZPR
SN74LVC1G08DBVR
SN74LVC1G08DBVT
SN74LVC1G08DCKR
SN74LVC1G08DCKT
SN74LVC1G08DRLR
CE_
C08_
ORDERABLE
PART NUMBER
SN74LVC1G08YEAR
SN74LVC1G08YZAR
_ _ _CE_
TOP-SIDE
MARKING‡
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2005, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
1