LITTLE LOGIC GATE (AND/NAND/OR/NOR/EX-OR)
No. of
Technology
Low-Voltage CMOS
Advanced CMOS
Low-Power CMOS
Description
Curcuit
Input
Output
Device
Input
AHC
AHCT
LVC
AUC
AUP
1
2
1
1G08
2G08
1G11
●
●
●
●
●
●
●
*
●
2
3
POSITIVE AND
1G00
1G38
1G132
2G00
2G38
2G132
1G10
●
●
●
●
●
●
●
●
●
*
●
1
OD
OD
SCH
SCH
2
3
POSITIVE NAND
2
1
●
1
2
1
1G32
2G32
●
●
●
●
●
●
●
●
●
●
●
●
●
2
3
POSITIVE OR
POSITIVE NOR
EXCLUSIVE OR
1G332
1
2
1
1G02
2G02
1G27
●
●
●
●
●
2
3
1
2
1
1G86
2G86
●
●
●
●
●
2
3
1G386
POSITIVE AND-OR
POSITIVE OR-AND
3
3
1
1
1G0832
1G3208
●
●
Explanatory notes [Input] SCH: Schmitt-Trigger Inputs
[Output] BUF: Buffered Output OC: Open-Collector Output 3S: 3-State Output
Status
●: Product available in technology indicated
*: New product planned in technology indicated
LITTLE LOGIC GATE (INVERTER / NON-INVERTER)
No. of
Technology
Advanced CMOS
Low-Voltage CMOS
Low-Power CMOS
AUP
Description
Curcuit
Input
Output
Device
Input
AHC
AHCT
LVC
AUC
BUF
UBF
1G04
1GU04
1GX04
1G06
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
1
UBF/BUF
OC
●
●
●
●
●
*
●
●
SCH
SCH
1G14
●
●
BUF
UBF
OC
2G04
INVERTING
1
2GU04
2G06
2
3
2G14
BUF
UBF
OC
3G04
3GU04
3G06
SCH
SCH
SCH
SCH
3G14
OC
1G07
1G17
1G34
2G07
2G17
2G34
3G07
3G17
3G34
●
●
●
●
●
●
●
●
●
●
●
●
●
●
1
2
3
BUF
OC
●
●
NON-INVERTING
1
BUF
OC
BUF
Explanatory notes [Input] SCH: Schmitt-Trigger Inputs
[Output] BUF: Buffered Output OC: Open-Collector Output 3S: 3-State Output
●: Product available in technology indicated *: New product planned in technology indicated
Status
73