Logic Diagram (SN74)
10
1
2
13
TRIPLE 3-INPUT
POSITIVE-NAND GATES
1A
1B
1C
12
6
1Y
● Y = A•B•C
3
4
5
2A
2B
2C
● 74AC11xxx: Product Available in Reduced-Noise
Advanced CMOS (11000 Series)
● 74ACT11xxx: Product Available in Reduced-Noise
Advanced CMOS (11000 Series)
2Y
3Y
11
10
9
3A
3B
3C
8
FUNCTION TABLE
(each gate)
INPUTS
B
OUTPUT
Y
A
C
H
L
H
X
L
H
X
X
L
L
H
H
H
X
X
X
ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS
SN74 CD74 SN74 CD74
AC
11
SN74 CD74
PARAMETER
MAX or MIN
TTL
LS
S
ALS
AS
F
UNIT
HC
HC
HCT
HCT
AC
AC
ICC
MAX
MAX
MAX
16.5
-0.4
16
3.3
-0.4
8
27
-1
2.2
-0.4
8
13
-2
7.7
-1
0.02
-4
0.04
-4
0.02
-4
0.04
-4
0.04
-24
24
0.02
-24
24
0.08
-24
24
mA
mA
mA
IOH
IOL
20
20
20
4
4
4
4
ACT SN74 CD74
LV
3V
LV
5V
LVC ALVC
PARAMETER
MAX or MIN
UNIT
11
ACT
ACT
3V
3V
ICC
IOH
IOL
MAX
MAX
MAX
0.04
-24
24
0.04
-24
24
0.08
-24
24
-
-6
6
0.02
-12
12
0.01
-24
24
0.01
-24
24
mA
mA
mA
SWITCHING CHARACTERISTICS
SN74 CD74 SN74 CD74
PARAMETER
INPUT
OUTPUT
MAX or MIN
TTL
LS
S
ALS
AS
F
HC
HC
HCT
HCT
tPLH
tPHL
A, B or C
A, B or C
Y
Y
MAX
MAX
22
15
15
15
4.5
5
11
10
4.5
4.5
6
24
24
30
30
19
19
36
36
5.3
AC
11
SN74 CD74 ACT SN74 CD74
LV
3V
LV
5V
LVC ALVC
PARAMETER
INPUT
OUTPUT
MAX or MIN
AC
AC
11
ACT
ACT
3V
3V
tPLH
A, B or C
A, B or C
Y
Y
MAX
MAX
6.7
7
8
12.2
12.2
8.9
8.2
10
13.5
13.5
13.5
13.5
9
9
4.9
4.9
3
3
tPHL
6.5
9.5
UNIT: ns
240
: OBSOLETED or NOT RECOMMENDED NEW DESIGNS
TI [ TEXAS INSTRUMENTS ]
