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SN74LVTH652NSR 参数 Datasheet PDF下载

SN74LVTH652NSR图片预览
型号: SN74LVTH652NSR
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V ABT八路总线收发器和寄存器具有三态输出 [3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS]
分类和应用: 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
文件页数/大小: 18 页 / 519 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SCBS706F − AUGUST 1997 − REVISED OCTOBER 2003
SN54LVTH652, SN74LVTH652
3.3 V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3 STATE OUTPUTS
description/ordering information (continued)
The ’LVTH652 devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the data bus or from the internal storage registers.
Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB
and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for
select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between
real-time and stored data. A low input selects real-time data and a high input selects stored data. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the ’LVTH652 devices.
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at
the appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB
and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops
by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input; therefore,
when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains
at its last state.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
When V
CC
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor
and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sinking/current-sourcing capability of the driver.
This device is fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
INPUTS
OEAB
L
L
X
H
L
L
L
L
H
H
H
OEBA
H
H
H
H
X
L
L
L
H
H
L
CLKAB
H or L
H or L
X
X
X
H or L
H or L
CLKBA
H or L
H or L
X
H or L
X
X
H or L
SAB
X
X
X
X‡
X
X
X
X
L
H
H
SBA
X
X
X
X
X
X‡
L
H
X
X
H
A1−A8
Input
Input
Input
Input
Unspecified‡
Output
Output
Output
Input
Input
Output
DATA I/O†
B1−B8
Input
Input
Unspecified‡
Output
Input
Input
Input
Input
Output
Output
Output
OPERATION OR FUNCTION
Isolation
Store A and B data
Store A, hold B
Store A in both registers
Hold A, store B
Store B in both registers
Real-time B data to A bus
Stored B data to A bus
Real-time A data to B bus
Stored A data to B bus
Stored A data to B bus and
stored B data to A bus
† The data-output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data-input functions always are
enabled; i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs.
‡ Select control = L; clocks can occur simultaneously.
Select control = H; clocks must be staggered to load both registers.
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265