SN74LVC1G08
SINGLE 2 INPUT POSITIVE AND GATE
SCES217S − APRIL 1999 − REVISED JUNE 2005
recommended operating conditions (see Note 4)
MIN
Operating
VCC
Supply voltage
Data retention only
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
0
0
VCC = 1.65 V
VCC = 2.3 V
IOH
High-level output current
VCC = 3 V
VCC = 4.5 V
VCC = 1.65 V
VCC = 2.3 V
IOL
Low-level output current
VCC = 3 V
VCC = 4.5 V
VCC = 1.8 V
±
0.15 V, 2.5 V
±
0.2 V
∆t/∆v
Input transition rise or fall rate
VCC = 3.3 V
±
0.3 V
VCC = 5 V
±
0.5 V
1.65
1.5
0.65
×
VCC
1.7
2
0.7
×
VCC
0.35
×
VCC
0.7
0.8
0.3
×
VCC
5.5
VCC
−4
−8
−16
−24
−32
4
8
16
24
32
20
10
5
ns/V
mA
mA
V
V
V
V
MAX
5.5
V
UNIT
VIH
High-level input voltage
VIL
Low-level input voltage
VI
VO
Input voltage
Output voltage
TA
Operating free-air temperature
−40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
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