ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢉꢊ
ꢀ ꢋꢁ ꢈꢄ ꢌ ꢊ ꢍꢋ ꢁꢎ ꢏꢐ ꢎ ꢑꢀ ꢋ ꢐꢋ ꢅ ꢌꢍ ꢑꢒ ꢈ ꢓꢐꢌ
SCES219N − APRIL 1999 − REVISED JUNE 2005
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
‡
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC1G32YEAR
SN74LVC1G32YZAR
SN74LVC1G32YEPR
SN74LVC1G32YZPR
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
Reel of 3000
_ _ _CG_
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
−40°C to 85°C
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74LVC1G32DBVR
SN74LVC1G32DBVT
SN74LVC1G32DCKR
SN74LVC1G32DCKT
SOT (SOT-23) − DBV
C32_
CG_
SOT (SC-70) − DCK
SOT (SOT-553) − DRL
Reel of 4000
SN74LVC1G32DRLR
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUTS
OUTPUT
Y
A
B
X
H
L
H
X
L
H
H
L
logic diagram (positive logic)
1
2
A
B
4
Y
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265