SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
SCES223O – APRIL 1999 – REVISED FEBRUARY 2007
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
ORDERING INFORMATION
T
A
PACKAGE
(1)
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SON – DRY
–40°C to 85°C
SOT (SOT-23) – DBV
SOT (SC-70) – DCK
SOT (SOT-553) – DRL
(1)
(2)
Reel of 3000
Reel of 5000
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
Reel of 4000
ORDERABLE PART NUMBER
SN74LVC1G125YZPR
SN74LVC1G125DRYR
SN74LVC1G125DBVR
SN74LVC1G125DBVT
SN74LVC1G125DCKR
SN74LVC1G125DCKT
SN74LVC1G125DRLR
TOP-SIDE MARKING
(2)
_ _ _ CM
CM_
C25_
CM_
CM_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
•
= Pb-free).
FUNCTION TABLE
INPUTS
OE
L
L
H
A
H
L
X
OUTPUT
Y
H
L
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
2