SN54HC74, SN74HC74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCLS094D – DECEMBER 1982 – REVISED JULY 2003
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
2V
fclock
Clock frequency
4.5 V
6V
2V
PRE or CLR low
tw
Pulse duration
CLK high or low
4.5 V
6V
2V
4.5 V
6V
2V
Data
tsu
Setup time before CLK↑
↑
PRE or CLR inactive
4.5 V
6V
2V
4.5 V
6V
2V
th
Hold time, data after CLK↑
↑
4.5 V
6V
0
100
20
17
80
16
14
100
20
17
25
5
4
0
0
0
TA = 25°C
MIN
MAX
6
31
36
0
150
30
25
120
24
20
150
30
25
40
8
7
0
0
0
SN54HC74
MIN
MAX
4.2
21
25
0
125
25
21
100
20
17
125
25
21
30
6
5
0
0
0
ns
ns
ns
SN74HC74
MIN
MAX
5
25
29
MHz
UNIT
switching characteristics over recommended operating free-air temperature range, C
L
= 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC
2V
fmax
4.5 V
6V
2V
PRE or CLR
tpd
d
CLK
Q or Q
Q or Q
4.5 V
6V
2V
4.5 V
6V
2V
tt
Q or Q
4.5 V
6V
TA = 25°C
MIN
TYP
MAX
6
31
36
10
50
60
70
20
15
70
20
15
28
8
6
230
46
39
175
35
30
75
15
13
SN54HC74
MIN
4.2
21
25
345
69
59
250
50
42
110
22
19
MAX
SN74HC74
MIN
5
25
29
290
58
49
220
44
37
95
19
16
ns
ns
MHz
MAX
UNIT
operating characteristics, T
A
= 25°C
PARAMETER
Cpd
Power dissipation capacitance per flip-flop
TEST CONDITIONS
No load
TYP
35
UNIT
pF
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TI [ TEXAS INSTRUMENTS ]
