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SN74CBTLV3257PWR 参数 Datasheet PDF下载

SN74CBTLV3257PWR图片预览
型号: SN74CBTLV3257PWR
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压4位1 - OF- 2 FET复用器/解复用器 [LOW-VOLTAGE 4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER]
分类和应用: 总线驱动器总线收发器解复用器逻辑集成电路光电二极管PC
文件页数/大小: 18 页 / 689 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN74CBTLV3257
LOW VOLTAGE 4 BIT 1 OF 2 FET MULTIPLEXER/DEMULTIPLEXER
SCDS040I − DECEMBER 1997 − REVISED OCTOBER 2003
D
5-Ω Switch Connection Between Two Ports
D
Rail-to-Rail Switching on Data I/O Ports
D
I
off
Supports Partial-Power-Down Mode
D
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D, DBQ, DGV, OR PW PACKAGE
(TOP VIEW)
D
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
RGY PACKAGE
(TOP VIEW)
S
1B1
1B2
1A
2B1
2B2
2A
GND
2
3
4
5
6
7
8
15
14
13
12
11
10
9
S
1
16
V
CC
OE
4B1
4B2
4A
3B1
3B2
3A
1
16
15
OE
14
4B1
13
4B2
12
4A
11
3B1
10
3B2
1B1
1B2
1A
2B1
2B2
2A
2
3
4
5
6
7
8
9
description/ordering information
The SN74CBTLV3257 is a 4-bit 1-of-2 high-speed FET multiplexer/demultiplexer. The low on-state resistance
of the switch allows connections to be made with minimal propagation delay.
The select (S) input controls the data flow. The FET multiplexers/demultiplexers are disabled when the
output-enable (OE) input is high.
This device is fully specified for partial-power-down applications using I
off
. The I
off
feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
QFN − RGY
SOIC − D
−40°C to 85°C
SSOP (QSOP) − DBQ
TSSOP − PW
TVSOP − DGV
PACKAGE†
Tape and reel
Tube
Tape and reel
Tape and reel
Tape and reel
Tape and reel
ORDERABLE
PART NUMBER
SN74CBTLV3257RGYR
SN74CBTLV3257D
SN74CBTLV3257DR
SN74CBTLV3257DBQR
SN74CBTLV3257PWR
SN74CBTLV3257DGVR
CBTLV3257
CL257
CL257
CL257
TOP-SIDE
MARKING
CL257
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
GND
Copyright
2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3A
V
CC
1