SN74AHC1G125
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
SCLS377H – AUGUST 1997 – REVISED JANUARY 2003
D
D
D
D
Operating Range of 2 V to 5.5 V
Max t
pd
of 6 ns at 5 V
Low Power Consumption, 10-µA Max I
CC
±8-mA
Output Drive at 5 V
DBV OR DCK PACKAGE
(TOP VIEW)
OE
A
GND
1
2
3
5
4
V
CC
Y
description/ordering information
The SN74AHC1G125 is a single bus buffer gate/line driver with 3-state output. The output is disabled when the
output-enable (OE) input is high. When OE is low, true data is passed from the A input to the Y output.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
SOT (SOT 23) – DBV
(SOT-23)
–40°C to 85°C
40°C
SOT (SC-70) – DCK
(SC 70)
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
ORDERABLE
PART NUMBER
SN74AHC1G125DBVR
SN74AHC1G125DBVT
SN74AHC1G125DCKR
SN74AHC1G125DCKT
AM_
AM
TOP-SIDE
MARKING‡
A25_
A25
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
‡ The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUTS
OE
L
L
H
A
H
L
X
OUTPUT
Y
H
L
Z
logic diagram (positive logic)
OE
A
1
2
4
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1