SN54AHC139, SN74AHC139
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS259K – DECEMBER 1995 – REVISED MARCH 2003
description/ordering information (continued)
The active-low enable (G) input can be used as a data line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its
driving circuit.
FUNCTION TABLE
(each decoder/demultiplexer)
INPUTS
SELECT
G
H
L
L
L
L
B
X
L
L
H
H
A
X
L
H
L
H
Y0
H
L
H
H
H
OUTPUTS
Y1
H
H
L
H
H
Y2
H
H
H
L
H
Y3
H
H
H
H
L
logic diagram (positive logic)
4
1G
1
5
1Y1
1Y0
6
1A
Select
Inputs
1B
2
7
1Y2
3
1Y3
Data
Outputs
12
2G
15
11
2Y0
2Y1
10
2A
Select
Inputs
2B
14
9
2Y2
13
2Y3
Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.
2
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