SN65LBC184, SN75LBC184
DIFFERENTIAL TRANSCEIVER
WITH TRANSIENT VOLTAGE SUPPRESSION
SLLS236A – OCTOBER 1996 – REVISED MAY 1998
APPLICATION INFORMATION
’LBC184 test description
The ’LBC184 is tested against the CEI IEC 1000–4–5 recommended transient identified as the combination
wave. The combination wave provides a 1.2-/50-µs open-circuit voltage waveform and a 8-/20-µs short-circuit
current waveform shown in Figure 9. The testing is performed with a combination/hybrid pulse generator with
an effective output impedance of 2
Ω.
The setup for the overvoltage stress is shown in Figure 10 with all testing
performed with power applied to the ’LBC184 circuit.
NOTE
High voltage transient testing is done on a sampling basis.
VI(peak)
0.5 VP
1.2
µs
II(peak)
0.5 IP
8
µs
50
µs
t
20
µs
t
Figure 9. Short-Circuit Current Waveforms
The ’LBC184 is tested and evaluated for both maximum (single pulse) as well as life test (multiple pulse)
capabilities. The ’LBC184 is evaluated against transients of both positive and negative polarity and all testing
is performed with the worst-case transient polarity. Transient pulses are applied to the bus pins (A & B) across
ground as shown in Figure 10.
IP
7
5
B/A
SN75LBC184
GND
Key Tech
1.2/50 – 8/20
Combination Pulse
Generator
2-Ω Internal Impedance
High
41.9
Ω
3
Ω
Low
Current
Limiter
VP
Figure 10. Overvoltage-Stress Test Circuit
An example waveform as seen by the ’LBC184 is shown in Figure 11. The bottom trace is current, the middle
trace shows the clamping voltage of the device and the top trace is power as calculated from the voltage and
current waveforms. This example shows a peak clamping voltage of 16 V, peak current of 33.6 A yielding an
absorbed peak power of 538 W.
NOTE
A circuit reset may be required to ensure normal data communications following a transient noise
pulse of greater than 250 W peak.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
11
TI [ TEXAS INSTRUMENTS ]
