SN65LBC184, SN75LBC184
DIFFERENTIAL TRANSCEIVER
WITH TRANSIENT VOLTAGE SUPPRESSION
SLLS236G − OCTOBER 1996 − REVISED MARCH 2007
APPLICATION INFORMATION
’LBC184 test description
The ’LBC184 is tested against the IEC 61000−4−5 recommended transient identified as the combination wave.
The combination wave provides a 1.2-/50-µs open-circuit voltage waveform and a 8-/20-µs short-circuit current
waveform shown in Figure 15. The testing is performed with a combination/hybrid pulse generator with an
effective output impedance of 2
Ω.
The setup for the overvoltage stress is shown in Figure 16 with all testing
performed with power applied to the ’LBC184 circuit.
NOTE
High voltage transient testing is done on a sampling basis.
VI(peak)
0.5 VP
II(peak)
0.5 IP
1.2
µs
t
50
µs
8
µs
t
20
µs
Figure 15. Short-Circuit Current Waveforms
The ’LBC184 is tested and evaluated for both maximum (single pulse) as well as life test (multiple pulse)
capabilities. The ’LBC184 is evaluated against transients of both positive and negative polarity and all testing
is performed with the worst-case transient polarity. Transient pulses are applied to the bus pins (A & B) across
ground as shown in Figure 16.
Key Tech
1.2/50 − 8/20
Combination Pulse
Generator
2-Ω Internal Impedance
High
41.9
Ω
IP
7
5
B/A
SN75LBC184
GND
3
Ω
Low
Impedance Matching
and Wave Shaping
VP
Figure 16. Overvoltage-Stress Test Circuit
An example waveform as seen by the ’LBC184 is shown in Figure 17. The bottom trace is current, the middle
trace shows the clamping voltage of the device and the top trace is power as calculated from the voltage and
current waveforms. This example shows a peak clamping voltage of 33.6 V and peak current of 16 A, thus
yielding an absorbed peak power of 538 W.
NOTE
A circuit reset may be required to ensure normal data communications following a transient noise
pulse of greater than 250 W peak.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
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