SLLS562G – AUGUST 2009 – REVISED MAY 2009
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PARAMETER MEASUREMENT INFORMATION
NOTE: Test load capacitance includes probe and jig capacitance (unless otherwise specified). Signal generator
characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty cycle. Z
O
= 50
Ω
(unless otherwise
specified).
I
I
0 V or 3 V
B
I
OB
A
I
OA
V
OD
50 pF
27
W
V
OC
27
W
Figure 1. Driver Test Circuit, V
OD
and V
OC
Without Common-Mode Loading
375
W
I
OA
0 V or 3 V
I
OB
V
OD
60
W
375
W
V
TEST
= -7 V to 12 V
V
TEST
Figure 2. Driver Test Circuit, V
OD
With Common-Mode Loading
27
W
A
27
W
50 pF
V
OC
V
OC
V
A
V
B
V
OC(PP)
-3.25 V
-1.75 V
DV
OC(SS)
Signal
Generator
50
W
B
Figure 3. Driver V
OC
Test Circuit and Waveforms
3V
Input
R
L
= 50
W
Signal
Generator
C
L
= 50 pF
50
W
Output
t
r
0V
V
OD
t
PLH
90%
10%
t
f
1.5 V
1.5 V
0V
t
PHL
V
OD(H)
V
OD(L)
Figure 4. Driver Switching Test Circuit and Waveforms
6
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