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SN65HVD3082E, SN75HVD3082E
SN65HVD3085E, SN65HVD3088E
SLLS562D − MARCH 2003 − REVISED SEPTEMBER 2005
A
0 V or 3 V
3 V if Testing A Output
0 V if Testing B Output
DE
Signal
Generator
50
Ω
D
B
S1
Output
DE
1.5 V
1.5 V
0.5 V
3V
0V
VOH
Output
2.5 V
tPHZ
VOff 0
CL = 50 pF
RL = 110
Ω
tPZH
Figure 5. Driver Enable/Disable Test Circuit and Waveforms, High Output
5V
RL = 110
Ω
3V
Output
CL = 50 pF
DE
tPZL
Output
1.5 V
1.5 V
0V
tPLZ
2.5 V
0.5 V
5V
VOL
A
D
0 V or 3 V
0 V if Testing A Output
3 V if Testing B Output
DE
Signal
Generator
50
Ω
B
S1
Figure 6. Driver Enable/Disable Test Circuit and Waveforms, Low Output
IOS
VO
Voltage
Source
IO
VID
VO
Figure 7. Driver Short-Circuit Test
Figure 8. Receiver Parameter Definitions
Signal
Generator
50
Ω
VID
A
B
R
IO
Input B
Input A
tPLH
Output
90%
1.5 V
tr
tf
50%
0V
tPHL
VOH
10% V
OL
1.5 V
Signal
Generator
50
Ω
CL = 15 pF
VO
Figure 9. Receiver Switching Test Circuit and Waveforms
7