SN65HVD3082E, SN75HVD3082E
SN65HVD3085E, SN65HVD3088E
SLLS562D − MARCH 2003 − REVISED SEPTEMBER 2005
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VCC
VCC
D
DE
A
54
Ω
B
3V
R
RE
1 kΩ
CL = 15 pF
tPZH
1.5 V
tPHZ
VOH
VOH −0.5 V
GND
0V
RE
1.5 V
0V
Signal
Generator
50
Ω
R
Figure 10. Receiver Enable/Disable Test Circuit and Waveforms, Data Output High
0V
VCC
D
DE
A
54
Ω
B
3V
R
RE
Signal
Generator
50
Ω
R
1.5 V
1 kΩ
CL = 15 pF
tPZL
tPLZ
VCC
VOL +0.5 V
VOL
5V
RE
1.5 V
0V
Figure 11. Receiver Enable/Disable Test Circuit and Waveforms, Data Output Low
VCC
A
R
B
1 kΩ
CL = 15 pF
RE
Signal
Generator
50
Ω
RE
1.5 V
Switch Down for V(A) = 1.5 V,
Switch Up for V(A) = −1.5 V
3V
1.5 V or
−1.5 V
0V
tPZH(SHDN)
tPZL(SHDN)
5V
R
0V
1.5 V
VOL
VOH
Figure 12. Receiver Enable From Shutdown Test Circuit and Waveforms
8
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