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SN65HVD3082E, SN75HVD3082E
SN65HVD3085E, SN65HVD3088E
SLLS562D − MARCH 2003 − REVISED SEPTEMBER 2005
100
Ω
Pulse Generator,
15
µs
Duration,
1% Duty Cycle
VTEST
0V
15
µs
1.5 ms
−VTEST
Figure 13. Test Circuit and Waveforms, Transient Over-Voltage Test
DEVICE INFORMATION
PIN ASSIGNMENTS
D, P OR DGK PACKAGE
(TOP VIEW)
D
LOGIC DIAGRAM (POSITIVE LOGIC)
4
R
RE
DE
D
1
2
3
4
8
7
6
5
V
CC
B
A
GND
3
DE
2
RE
R 1
6
7
A
B
FUNCTION TABLE
DRIVER
INPUT
D
H
L
X
Open
X
ENABLE
DE
H
H
L
H
Open
OUTPUTS
A
H
L
Z
H
Z
B
L
H
Z
L
Z
RECEIVER
DIFFERENTIAL INPUTS
VID = VA – VB
VID
≤
−0.2 V
−0.2 V < VID < −0.01 V
−0.01 V
≤
VID
X
Open circuit
Short circuit
X
NOTE: H= high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate
ENABLE
RE
L
L
L
H
L
L
Open
OUTPUT
R
L
?
H
Z
H
H
Z
9
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