SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101D – JULY 1985 – REVISED APRIL 2003
switching characteristics, V
CC
= 5 V, C
L
= 15 pF, T
A
= 25°C
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
Output enable time to high level
Output enable time to low level
Output disable time from high level
Output disable time from low level
TEST CONDITIONS
VID = 0 to 3 V, See Figure 6
V
See Figure 7
See Figure 7
MIN
TYP
21
23
10
12
20
17
MAX
35
35
20
20
35
25
UNIT
ns
ns
ns
PARAMETER MEASUREMENT INFORMATION
RL
VOD2
2
RL
2
VOC
VID
VOH
VOL
+IOL
–IOH
Figure 1. Driver V
OD
and V
OC
Figure 2. Receiver V
OH
and V
OL
3V
Input
CL = 50 pF
(see Note A)
Output
Output
50%
10%
1.5 V
1.5 V
0V
td(OD)
90%
td(OD)
≈2.5
V
50%
10%
≈–2.5
V
tt(OD)
Generator
(see Note B)
50
Ω
3V
RL = 54
Ω
tt(OD)
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR
≤
1 MHz, 50% duty cycle, tr
≤
6 ns, tf
≤
6 ns,
ZO = 50
Ω.
Figure 3. Driver Test Circuit and Voltage Waveforms
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
7