ꢀ ꢁꢂꢃ ꢂꢄ ꢅ ꢀꢁꢆ ꢃ ꢂꢄ
ꢇ ꢈꢁꢉ ꢊ ꢋꢌ ꢍ ꢎ ꢁ ꢏꢉ ꢊꢀ ꢈꢐꢑ ꢍ ꢒꢌ ꢓ ꢔꢕ ꢒꢉ ꢊꢋꢌꢕ ꢇꢀ
SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003
†
APPLICATION INFORMATION
output circuitry
The SG2524 contains two identical npn transistors, the collectors and emitters of which are uncommitted. Each
transistor has antisaturation circuitry that limits the current through that transistor to a maximum of 100 mA for
fast response.
general
There are a wide variety of output configurations possible when considering the application of the SG2524 as
a voltage-regulator control circuit. They can be segregated into three basic categories:
D
D
D
Capacitor-diode-coupled voltage multipliers
Inductor-capacitor-implemented single-ended circuits
Transformer-coupled circuits
Examples of these categories are shown in Figures 9, 10, and 11, respectively. Detailed diagrams of specific
applications are shown in Figures 12–15.
D1
V
O
V
I
V > V
I
O
D1
V
O
V
V
I
V < V
I
O
D1
–V
O
I
| +V | > | – V
|
I
O
Figure 9. Capacitor-Diode-Coupled Voltage-Multiplier Output Stages
†
Throughout these discussions, references to the SG2524 apply also to the SG3524.
10
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