RM48L950
RM48L750
RM48L550
SPNS174–SEPTEMBER 2011
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4.21.8 RAM Trace Port (RTP)
The RTP provides the ability to datalog the RAM contents of the RM4x devices or accesses to peripherals
without program intrusion. It can trace all data write or read accesses to internal RAM. In addition, it
provides the capability to directly transfer data to a FIFO to support a CPU-controlled transmission of the
data. The trace data is transmitted over a dedicated external interface.
4.21.8.1 Features
The RTP offers the following features:
•
Two modes of operation - Trace Mode and Direct Data Mode
– Trace Mode
•
•
•
•
•
•
Non-intrusive data trace on write or read operation
Visibility of RAM content at any time on external capture hardware
Trace of peripheral accesses
2 configurable trace regions for each RAM module to limit amount of data to be traced
FIFO to store data and address of data of multiple read/write operations
Trace of CPU and/or DMA accesses with indication of the master in the transmitted data packet
–
Direct Data Mode
•
Directly write data with the CPU or trace read operations to a FIFO, without transmitting header
and address information
•
•
•
•
Dedicated synchronous interface to transmit data to external devices
Free-running clock generation or clock stop mode between transmissions
Up to 100 Mbit per sec/pin transfer rate for transmitting data
Pins not used in functional mode can be used as GIOs
4.21.8.2 Timing Specifications
tl(RTP)
th(RTP)
tf
tr
tcyc(RTP)
Figure 4-24. RTPCLK Timing
Table 4-43. RTPCLK Timing
Parameter
MIN
Description
tcyc(RTP)
tc(HCLK) * 2
Clock period, prescaled from HCLK; must not be faster
than HCLK / 2
th(RTP)
tl(RTP)
((tcyc(RTP))/2) - ((tr+tf)/2)
((tcyc(RTP))/2) - ((tr+tf)/2)
High pulse width
Low pulse width
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System Information and Electrical Specifications
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