RM46L450
RM46L850
SPNS184 –SEPTEMBER 2012
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2.3.2.15 External Memory Interface (EMIF)
Table 2-42. External Memory Interface (EMIF)
Terminal
Signal
Type
Default
Pull State
Pull Type
Description
Signal Name
337
ZWT
EMIF_CKE
EMIF_CLK
L3
K3
Output Pull Down
I/O
-
EMIF Clock Enable
EMIF clock. This is an
output signal in functional
mode. It is gated off by
default, so that the signal
is tri-stated. PINMUX29[8]
must be cleared to enable
this output.
EMIF_nWE/EMIF_RNW
EMIF_nOE
D17
E12
P3
Output Pull Up
Pull Down
-
EMIF Read-Not-Write
EMIF Read Enable
-
EMIF_nWAIT
I/O
Pull Up
Fixed, 20uA
EMIF Extended Wait
Signal
EMIF_nWE/EMIF_RNW
D17
R4
Output Pull Up
Output
Programmable, EMIF Write Enable.
20uA
EMIF_nCAS
EMIF column address
strobe
EMIF_nRAS
R3
Output
EMIF row address strobe
EMIF_nCS[0]/N2HET2[7](1)
N17
Output Pull Down
EMIF chip select,
synchronous
EMIF_nCS[2]
EMIF_nCS[3]/N2HET2[9](1)
L17
K17
M17
E10
E11
Output Pull Up
Output Pull Down
Output Pull Up
EMIF chip selects,
asynchronous
This applies to chip
selects 2, 3 and 4
EMIF_nCS[4]
EMIF_nDQM[0]
EMIF_nDQM[1]
Output Pull Down Programmable, EMIF Data Mask or Write
20uA
Strobe.
Output
Data mask for SDRAM
devices, write strobe for
connected asynchronous
devices.
EMIF_BA[0]
E13
D16
Output
Output
EMIF bank address or
address line
EMIF_BA[1]/N2HET2[5](1)
EMIF bank address or
address line
EMIF_ADDR[0]/N2HET2[1](1)
EMIF_ADDR[1]/N2HET2[3](1)
EMIF_ADDR[2]
D4
D5
E6
E7
E8
E9
C4
C5
C6
C7
C8
C9
C10
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
EMIF address
EMIF_ADDR[3]
EMIF_ADDR[4]
EMIF_ADDR[5]
EMIF_ADDR[6]/NHET2[11](1)
EMIF_ADDR[7]/NHET2[13](1)
EMIF_ADDR[8]/NHET2[15](1)
EMIF_ADDR[9]
EMIF_ADDR[10]
EMIF_ADDR[11]
EMIF_ADDR[12]
(1) These signals are tri-stated and pulled down by default after power-up. Any application that requires the EMIF must set the bit 31 of the
system module general-purpose register GPREG1.
38
Device Package and Terminal Functions
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