SPECIFICATIONS
All specifications at TA = +25°C, ±VCC = ±VDD = ±5V, fS = 768kHz (96kHz • 8), and 24-bit data, unless otherwise noted.
PCM1704U
TYP
PARAMETER
RESOLUTION
CONDITIONS
MIN
MAX
UNITS
24
Bits
DATA FORMAT
Audio Data Interface Format
Audio Data Code
20-, 24-Bit, MSB-First
Binary Two’s Complement
Sampling Frequency (fS)
Input Clock Frequency
16
96
25
kHz
MHz
DIGITAL INPUT/OUTPUT
Input Logic Level:
(1)
VIH
+2.0
0
+5.0
+0.8
0
V
V
V
V
(1)
VIL
(2)
VIH
–3.0
–5.0
(2)
VIL
–4.2
Input Logic Current:
(1)
IIH
VIH = +VDD
VIL = 0V
±10
±10
±10
µA
µA
µA
µA
(1)
IIL
(2)
IIH
VIH = 0V
(2)
IIL
VIL = –VDD
–100
DYNAMIC PERFORMANCE(3)
THD+N
VO = 0dB
PCM1704U
PCM1704U-J
0.0025
0.0015
0.0008
0.008
0.0030
0.0025
0.0015
0.020
0.015
0.01
%
%
%
%
%
%
PCM1704U-K
VO =–20dB
PCM1704U
PCM1704U-J
0.007
PCM1704U-K
0.006
Dynamic Range
EIAJ, A-weighted
PCM1704U, U-J
PCM1704U-K
102
106
112
110
112
120
±0.5
dB
dB
dB
dB
Signal-to-Noise Ratio
Low Level Linearity
EIAJ, A-weighted
f = 1002Hz at –90dB
DC ACCURACY
Gain Error
±1.0
±0.5
±25
±5
±3.0
±1.0
% of FSR
% of FSR
Bipolar Zero Error
Gain Drift
0°C to 70°C
0°C to 70°C
ppm of FSR/°C
ppm of FSR/°C
Bipolar Zero Error Drift
ANALOG OUTPUT
Output Range
±1.2
1.0
mA
kΩ
ns
Output Impedance
Settling Time
±0.0003% of FSR, ±1.2mA Step
200
POWER SUPPLY REQUIREMENTS
Voltage Range: +VCC = +VDD
–VCC = –VDD
+4.75
–4.75
+5.0
–5.0
5
+5.25
–5.25
8
VDC
VDC
mA
Combined Supply Current:+ICC
–ICC
+VCC = +VDD = +5.0V
–VCC = –VDD = –5.0V
30
45
mA
TEMPERATURE RANGE
Operation
–25
–55
+85
°C
°C
Storage
+125
NOTES: (1) BCLK, WCLK, DATA. (2) 20BIT, INVERT. (3) Dynamic performance data is tested with 5534 I/V amp with 7.5kΩ feedback resistor. THD+N data is
tested by Shibasoku 725C with 30kHz external LPF, 400Hz HPF, average mode. Input signal frequency = 1.1kHz.
®
2
PCM1704
TI [ TEXAS INSTRUMENTS ]
