PCA9306
SCPS113I–OCTOBER 2004–REVISED JULY 2008....................................................................................................................................................... www.ti.com
V
DPU
= 3.3 V
3.3-V Enable Signal
On
Off
200 kΩ
PCA9306
EN
8
7
V
REF1
= 1.8 V
R
PU
R
PU
2
V
V
REF1
REF2
R
R
PU
PU
V
CC
V
CC
3
SCL1
SCL2
6
SCL
SCL
2
SW
2
I C Bus
Device
I C Bus
Master
SDA1
SDA2
5
4
SW
SDA
SDA
GND
1
GND
GND
Figure 3. Typical Application Circuit (Switch Enable Control)
Bidirectional Translation
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage),
the EN input must be connected to VREF2 and both pins pulled to high-side VDPU through a pullup resistor
(typically 200 kΩ). This allows VREF2 to regulate the EN input. A filter capacitor on VREF2 is recommended. The
I2C bus master output can be totem pole or open drain (pullup resistors may be required) and the I2C bus device
output can be totem pole or open drain (pullup resistors are required to pull the SCL2 and SDA2 outputs to
VDPU). However, if either output is totem pole, data must be unidirectional or the outputs must be 3-stateable and
be controlled by some direction-control mechanism to prevent high-to-low contentions in either direction. If both
outputs are open drain, no direction control is needed.
The reference supply voltage (VREF1) is connected to the processor core power-supply voltage.
Application Operating Conditions
see Figure 2
MIN TYP(1)
MAX UNIT
VREF2
EN
Reference voltage
VREF1 + 0.6
2.1
2.1
1.5
14
5
5
5
V
V
Enable input voltage
VREF1 + 0.6
0
VREF1
IPASS
IREF
TA
Reference voltage
4.4
V
Pass switch current
mA
µA
°C
Reference-transistor current
Operating free-air temperature
–40
85
(1) All typical values are at TA = 25°C.
8
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