into this midpoint voltage bias. The input voltage can swing
to within 1.25V of either supply pin, giving a 2.5VPP input
signal range centered between the supply pins. The input
impedance of Figure 3 is set to give a 50Ω input match. If the
source does not require a 50Ω match, remove this and drive
directly into the blocking capacitor. The source will then see
the 5kΩ load of the biasing network. The gain resistor (RG)
is AC-coupled, giving the circuit a DC gain of +1, which puts
the noninverting input DC bias voltage (2.5V) on the output
as well. The feedback resistor value has been adjusted from
the bipolar ±5V supply condition to re-optimize for a flat
frequency response in +5V only, gain of +2, operation. On a
single +5V supply, the output voltage can swing to within
0.9V of either supply pin while delivering more than 70mA
output current, giving 3.2V output swing into 100Ω (8dBm
maximum at a matched 50Ω load). The circuit of Figure 3
shows a blocking capacitor driving into a 1kΩ load. Alterna-
tively, the blocking capacitor could be removed if the load is
tied to a supply midpoint or to ground if the DC current
required by the load is acceptable.
a current-feedback amplifier, wideband operation is retained
even under this condition.
The circuits of Figure 3 and 4 show single-supply operation
at +5V. These same circuits may be used up to single
supplies of +12V with minimal change in the performance of
the OPA2683.
+5V
+
0.1µF
6.8µF
10kΩ
10kΩ
0.1µF
1/2
OPA2683
VO
0.1µF
0.1µF
1kΩ
RG
1.2kΩ
RF
1.2kΩ
50Ω Source
VI
RM
52.3Ω
+5V
FIGURE 4. AC-Coupled, G = –1V/V, Single-Supply Specifi-
cations and Test Circuit.
+
0.1µF
6.8µF
10kΩ
10kΩ
50Ω Source
0.1µF
DIFFERENTIAL INTERFACE APPLICATIONS
VI
0.1µF
Dual op amps are particularly suitable to differential input to
differential output applications. Typically, these fall into either
Analog-to-Digital Converter (ADC) input interfaces or line
driver applications. Two basic approaches to differential I/O
are noninverting or inverting configurations. Since the output
is differential, the signal polarity is somewhat meaningless—
the noninverting and inverting terminology applies here to
where the input is brought into the OPA2683. Each has its
advantages and disadvantages. Figure 5 shows a basic
starting point for noninverting differential I/O applications.
1/2
OPA2683
RM
50Ω
VO
1kΩ
RF
1.2kΩ
RG
1.2kΩ
0.1µF
FIGURE 3. AC-Coupled, G = +2V/V, Single-Supply Specifi-
cations and Test Circuit.
+VCC
Figure 4 shows the AC-coupled, single +5V supply, gain of
–1V/V circuit configuration used as a basis for the +5V
Typical Characteristics for each channel. In this case, the
midpoint DC bias on the noninverting input is also decoupled
with an additional 0.1µF decoupling capacitor. This reduces
the source impedance at higher frequencies for the
noninverting input bias current noise. This 2.5V bias on the
noninverting input pin appears on the inverting input pin and,
since RG is DC blocked by the input capacitor, will also
appear at the output pin. One advantage to inverting opera-
tion is that since there is no signal swing across the input
stage, higher slew rates and operation to even lower supply
voltages is possible. To retain a 1VPP output capability,
operation down to 3V supply is allowed. At +3V supply, the
input stage is saturated, but for the inverting configuration of
1/2
OPA2683
RF
953Ω
RF
953Ω
VI
VO
RG
1/2
OPA2683
–VCC
FIGURE 5. Noninverting Differential I/O Amplifier.
OPA2683
SBOS244H
14
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