MSP430F663x
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SLAS566C –JUNE 2010–REVISED AUGUST 2012
Table 3. Terminal Functions (continued)
TERMINAL
NAME
NO.
PZ ZQW
I/O(1)
DESCRIPTION
General-purpose digital I/O
P5.6/ADC12CLK/DMAE0
16
H1
I/O
Conversion clock output ADC (not available on F6632, F6631, F6630 devices)
DMA external trigger input
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: USCI_B0 SPI slave transmit enable; USCI_A0 clock input/output
P2.0/P2MAP0
P2.1/P2MAP1
P2.2/P2MAP2
P2.3/P2MAP3
P2.4/P2MAP4
P2.5/P2MAP5
17
18
19
20
21
22
G4
H2
J1
I/O
I/O
I/O
I/O
I/O
I/O
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: USCI_B0 SPI slave in/master out; USCI_B0 I2C data
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: USCI_B0 SPI slave out/master in; USCI_B0 I2C clock
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: USCI_B0 clock input/output; USCI_A0 SPI slave transmit enable
H4
J2
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: USCI_A0 UART transmit data; USCI_A0 SPI slave in/master out
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: USCI_A0 UART receive data; USCI_A0 slave out/master in
K1
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: no secondary function
P2.6/P2MAP6/R03
23
24
K2
L2
I/O
I/O
Input/output port of lowest analog LCD voltage (V5)
General-purpose digital I/O with port interrupt and mappable secondary function
Default mapping: no secondary function
P2.7/P2MAP7/LCDREF/R13
External reference voltage input for regulated LCD voltage
Input/output port of third most positive analog LCD voltage (V3 or V4)
DVCC1
25
26
27
L1
M1
M2
Digital power supply
DVSS1
VCORE(2)
Digital ground supply
Regulated core power supply (internal use only, no external current loading)
General-purpose digital I/O
P5.2/R23
28
L3
I/O
Input/output port of second most positive analog LCD voltage (V2)
LCD capacitor connection
LCDCAP/R33
COM0
29
30
31
M3
J4
I/O
O
Input/output port of most positive analog LCD voltage (V1)
CAUTION: LCDCAP/R33 must be connected to DVSS if not used.
LCD common output COM0 for LCD backplane
General-purpose digital I/O
P5.3/COM1/S42
L4
I/O
LCD common output COM1 for LCD backplane
LCD segment output S42
General-purpose digital I/O
P5.4/COM2/S41
P5.5/COM3/S40
32
33
M4
J5
I/O
I/O
LCD common output COM2 for LCD backplane
LCD segment output S41
General-purpose digital I/O
LCD common output COM3 for LCD backplane
LCD segment output S40
(2) VCORE is for internal use only. No external current loading is possible. VCORE should only be connected to the recommended
capacitor value, CVCORE
.
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