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MSP430F1232IPWR 参数 Datasheet PDF下载

MSP430F1232IPWR图片预览
型号: MSP430F1232IPWR
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号微控制器 [MIXED SIGNAL MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 49 页 / 1130 K
品牌: TI [ TEXAS INSTRUMENTS ]
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MSP430x11x2, MSP430x12x2
MIXED SIGNAL MICROCONTROLLER
SLAS361D − JANUARY 2002 − REVISED AUGUST 2004
Terminal Functions, MSP430x12x2
NAME
P1.0/TACLK/
ADC10CLK
P1.1/TA0
P1.2/TA1
P1.3/TA2
P1.4/SMCLK/TCK
P1.5/TA0/TMS
P1.6/TA1/TDI/TCLK
P1.7/TA2/TDO/TDI
P2.0/ACLK/A0
P2.1/INCLK/A1
P2.2/TA0/A2
P2.3/TA1/A3/V
REF−
/
V
eREF−
P2.4/TA2/A4/V
REF+
/
V
eREF+
P2.5/R
OSC
P3.0/STE0/A5
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
P3.4/UTXD0
P3.5/URXD0
P3.6/A6
P3.7/A7
RST/NMI
TEST
V
CC
V
SS
XIN
XOUT
NC
QFN Pad
TERMINAL
DW & PW
21
22
23
24
25
26
27
28
8
9
10
19
20
3
11
12
13
14
15
16
17
18
7
1
2
4
6
5
NA
NA
RHB
21
22
23
24
25
26
27
28
6
7
8
18
19
32
9
10
11
12
13
14
15
16
5
29
30
1
3
2
4,17,20,31
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
DESCRIPTION
General-purpose digital I/O pin/Timer_A, clock signal TACLK input/conversion
clock—10-bit ADC
General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0
output/BSL transmit
General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output
General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output
General-purpose digital I/O pin/SMCLK signal output/test clock, input terminal for
device programming and test
General-purpose digital I/O pin/Timer_A, compare: Out0 output/test mode select,
input terminal for device programming and test
General-purpose digital I/O pin/Timer_A, compare: Out1 output/test data input
terminal or test clock input
General-purpose digital I/O pin/Timer_A, compare: Out2 output/test data output
terminal or data input during programming
General-purpose digital I/O pin/ACLK output/analog input to 10-bit ADC input A0
General-purpose digital I/O pin/Timer_A, clock signal at INCLK/analog input to 10-bit
ADC input A1
General-purpose digital I/O pin/Timer_A, capture: CCI0B input, compare: Out0
output/analog input to 10-bit ADC input A2/BSL receive
General-purpose digital I/O pin/Timer_A, capture: CCI1B input, compare: Out1
output/analog input to 10-bit ADC input A3/negative reference voltage terminal.
General-purpose digital I/O pin/Timer_A, compare: Out2 output/analog input to 10-bit
ADC input A4/I/O of positive reference voltage terminal
General-purpose digital I/O pin/Input for external resistor that defines the DCO
nominal frequency
General-purpose digital I/O pin/slave transmit enable—USART0/SPI mode/analog
input to 10-bit ADC input A5
General-purpose digital I/O pin/slave in/master out of USART0/SPI mode
General-purpose digital I/O pin/slave out/master in of USART0/SPI mode
General-purpose digital I/O pin/external clock input—USART0/UART or SPI mode,
clock output—USART0/SPI mode clock input
General-purpose digital I/O pin/transmit data out—USART0/UART mode
General-purpose digital I/O pin/receive data in—USART0/UART mode
General-purpose digital I/O pin/analog input to 10-bit ADC input A6
General-purpose digital I/O pin/analog input to 10-bit ADC input A7
Reset or nonmaskable interrupt input
Selects test mode for JTAG pins on P1.x
Supply voltage
Ground reference
I
O
Input terminal of crystal oscillator
Output terminal of crystal oscillator
Not connected internally. Recommended connection to V
SS
.
QFN package pad connection to V
SS
recommended.
TDO or TDI is selected via JTAG instruction.
6
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DALLAS, TEXAS 75265