LMH6642, LMH6643, LMH6644
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SNOS966P –MAY 2001–REVISED MARCH 2013
(1)
Operating Ratings
Supply Voltage (V+ – V−)
2.7V to 12.8V
−40°C to +85°C
265°C/W
(2)
Junction Temperature Range
Package Thermal Resistance (2) (θJA
)
5-Pin SOT-23
8-Pin SOIC
190°C/W
8-Pin VSSOP
14-Pin SOIC
14- Pin TSSOP
235°C/W
145°C/W
155°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
(2) The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.
3V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 3V, V− = 0V, VCM = VO = V+/2, VID (input differential
voltage) as noted (where applicable) and RL = 2kΩ to V+/2. Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(1)
(2)
(1)
BW
−3dB BW
AV = +1, VOUT = 200mVPP
80
115
46
MHz
MHz
AV = +2, −1, VOUT = 200mVPP
BW0.1dB
0.1dB Gain Flatness
AV = +2, RL = 150Ω to V+/2,
RL = 402Ω, VOUT = 200mVPP
19
PBW
en
Full Power Bandwidth
AV = +1, −1dB, VOUT = 1VPP
f = 100kHz
40
17
MHz
Input-Referred Voltage Noise
nV/√Hz
f = 1kHz
48
in
Input-Referred Current Noise
f = 100kHz
0.90
3.3
−48
pA/√Hz
f = 1kHz
THD
DG
Total Harmonic Distortion
Differential Gain
f = 5MHz, VO = 2VPP, AV = −1,
RL = 100Ω to V+/2
dBc
VCM = 1V, NTSC, AV = +2
0.17
RL =150Ω to V+/2
%
RL =1kΩ to V+/2
0.03
0.05
DP
Differential Phase
VCM = 1V, NTSC, AV = +2
RL =150Ω to V+/2
deg
RL =1kΩ to V+/2
0.03
47
CT Rej.
TS
Cross-Talk Rejection
Settling Time
f = 5MHz, Receiver:
Rf = Rg = 510Ω, AV = +2
dB
ns
VO = 2VPP, ±0.1%, 8pF Load,
VS = 5V
68
(3)
SR
Slew Rate
AV = −1, VI = 2VPP
90
120
±1
V/µs
VOS
Input Offset Voltage
For LMH6642 and LMH6644
±5
±7
mV
For LMH6643
±1
±3.4
±7
(4)
TC VOS
IB
Input Offset Average Drift
Input Bias Current
See
±5
µV/°C
µA
(5)
See
−1.50
−2.60
−3.25
IOS
RIN
Input Offset Current
20
3
800
1000
nA
Common Mode Input Resistance
MΩ
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm.
(3) Slew rate is the average of the rising and falling slew rates.
(4) Offset voltage average drift determined by dividing the change in VOS at temperature extremes by the total temperature change.
(5) Positive current corresponds to current flowing into the device.
Copyright © 2001–2013, Texas Instruments Incorporated
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