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LMC662AIMX/NOPB 参数 Datasheet PDF下载

LMC662AIMX/NOPB图片预览
型号: LMC662AIMX/NOPB
PDF下载: 下载PDF文件 查看货源
内容描述: LMC662 CMOS双路运算放大器 [LMC662 CMOS Dual Operational Amplifier]
分类和应用: 运算放大器光电二极管
文件页数/大小: 23 页 / 1207 K
品牌: TI [ TEXAS INSTRUMENTS ]
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LMC662  
www.ti.com  
SNOSC51C APRIL 1998REVISED MARCH 2013  
APPLICATION HINTS  
AMPLIFIER TOPOLOGY  
The topology chosen for the LMC662, shown in Figure 15, is unconventional (compared to general-purpose op  
amps) in that the traditional unity-gain buffer output stage is not used; instead, the output is taken directly from  
the output of the integrator, to allow rail-to-rail output swing. Since the buffer traditionally delivers the power to  
the load, while maintaining high op amp gain and stability, and must withstand shorts to either rail, these tasks  
now fall to the integrator.  
As a result of these demands, the integrator is a compound affair with an embedded gain stage that is doubly fed  
forward (via Cf and Cff) by a dedicated unity-gain compensation driver. In addition, the output portion of the  
integrator is a push-pull configuration for delivering heavy loads. While sinking current the whole amplifier path  
consists of three gain stages with one stage fed forward, whereas while sourcing the path contains four gain  
stages with two fed forward.  
Figure 15. LMC662 Circuit Topology (Each Amplifier)  
The large signal voltage gain while sourcing is comparable to traditional bipolar op amps, even with a 600Ω load.  
The gain while sinking is higher than most CMOS op amps, due to the additional gain stage; however, under  
heavy load (600Ω) the gain will be reduced as indicated in the Electrical Characteristics.  
COMPENSATING INPUT CAPACITANCE  
The high input resistance of the LMC662 op amps allows the use of large feedback and source resistor values  
without losing gain accuracy due to loading. However, the circuit will be especially sensitive to its layout when  
these large-value resistors are used.  
Every amplifier has some capacitance between each input and AC ground, and also some differential  
capacitance between the inputs. When the feedback network around an amplifier is resistive, this input  
capacitance (along with any additional capacitance due to circuit board traces, the socket, etc.) and the feedback  
resistors create a pole in the feedback path. In the following General Operational Amplifier Circuit, Figure 16, the  
frequency of this pole is  
(1)  
where: CS is the total capacitance at the inverting input, including amplifier input capacitance and any stray  
capacitance from the IC socket (if one is used), circuit board traces, etc., and RP is the parallel combination of RF  
and RIN. This formula, as well as all formulae derived below, apply to inverting and non-inverting op-amp  
configurations.  
When the feedback resistors are smaller than a few kΩ, the frequency of the feedback pole will be quite high,  
since CS is generally less than 10 pF. If the frequency of the feedback pole is much higher than the “ideal”  
closed-loop bandwidth (the nominal closed-loop bandwidth in the absence of CS), the pole will have a negligible  
effect on stability, as it will add only a small amount of phase shift.  
Copyright © 1998–2013, Texas Instruments Incorporated  
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Product Folder Links: LMC662