LM3241
SNOSB38B –JANUARY 2009–REVISED APRIL 2013
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FUNCTIONAL DESCRIPTION
Device Information
The LM3241 is a simple, step-down DC-DC converter optimized for powering RF power amplifiers (PAs) in
mobile phones, portable communicators, and similar battery-powered RF devices. It is designed to allow the RF
PA to operate at maximum efficiency over a wide range of power levels from a single Li-Ion battery cell. It is
based on a voltage-mode buck architecture, with synchronous rectification for high efficiency. It is designed for a
maximum load capability of 750 mA in PWM mode. Maximum load range may vary from this depending on input
voltage, output voltage and the inductor chosen.
There are three modes of operation depending on the current required: PWM (Pulse Width Modulation), ECO
(ECOnomy), and shutdown. The LM3241 operates in PWM mode at higher load current conditions. Lighter loads
cause the device to automatically switch into ECO mode. Shutdown mode turns the device off and reduces
battery consumption to 0.1 µA (typ.).
DC PWM mode output voltage precision is ±2% for 3.4VOUT. Efficiency is typically around 95% (typ.) for a 500
mA load with 3.3V output, 3.9V input. The output voltage is dynamically programmable from 0.6V to 3.4V by
adjusting the voltage on the control pin (VCON) without the need for external feedback resistors. This ensures
longer battery life by being able to change the PA supply voltage dynamically depending on its transmitting
power.
Additional features include current overload protection and thermal overload shutdown.
The LM3241 is constructed using a chip-scale 6-bump DSBGA package. This package offers the smallest
possible size for space-critical applications, such as cell phones, where board area is an important design
consideration. Use of a high switching frequency (6MHz, typ.) reduces the size of external components. As
shown in the Typical Application Circuit, only three external power components are required for implementation.
Use of a DSBGA package requires special design considerations for implementation. (See DSBGA Package
Assembly and Use in the APPLICATION INFORMATION section.) Its fine-bump pitch requires careful board
design and precision assembly equipment. Use of this package is best suited for opaque-case applications,
where its edges are not subject to high-intensity ambient red or infrared light. Also, the system controller should
set EN low during power-up and other low supply voltage conditions. (See Shutdown Mode below.)
Circuit Operation
Referring to the Typical Application Circuit and the BLOCK DIAGRAM, the LM3241 operates as follows. During
the first part of each switching cycle, the control block in the LM3241 turns on the internal top-side PFET switch.
This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor
limits the current to a ramp with a slope of around (VIN - VOUT) / L, by storing energy in a magnetic field. During
the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and
then turns the bottom-side NFET synchronous rectifier on. In response, the inductor’s magnetic field collapses,
generating a voltage that forces current from ground through the synchronous rectifier to the output filter
capacitor and load. As the stored energy is transferred back into the circuit and depleted, the inductor current
ramps down with a slope around VOUT / L. The output filter capacitor stores charge when the inductor current is
high, and releases it when low, smoothing the voltage across the load.
The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the
load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and
synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter capacitor. The output
voltage is equal to the average voltage at the SW pin.
PWM Mode Operation
While in PWM mode operation, the converter operates as a voltage-mode controller with input voltage feed
forward. This allows the converter to achieve excellent load and line regulation. The DC gain of the power stage
is proportional to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input
voltage is introduced. While in PWM mode, the output voltage is regulated by switching at a constant frequency
and then modulating the energy per cycle to control power to the load. At the beginning of each clock cycle the
PFET switch is turned on and the inductor current ramps up until the comparator trips and the control logic turns
off the switch. The current limit comparator can also turn off the switch in case the current limit of the PFET is
exceeded. Then the NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by
the clock turning off the NFET and turning on the PFET.
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