LM2596
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SNVS124C –NOVEMBER 1999–REVISED APRIL 2013
CIN —68 μF/25V Tant. Sprague 595D
470 μF/50V Elec. Panasonic HFQ
COUT —47 μF/20V Tant. Sprague 595D
220 μF/25V Elec. Panasonic HFQ
Figure 37. Inverting −5V Regulator with Delayed Startup
Figure 38. Inverting Regulator Typical Load Current
Because of differences in the operation of the inverting regulator, the standard design procedure is not used to
select the inductor value. In the majority of designs, a 33 μH, 3.5A inductor is the best choice. Capacitor
selection can also be narrowed down to just a few values. Using the values shown in Figure 37 will provide good
results in the majority of inverting designs.
This type of inverting regulator can require relatively large amounts of input current when starting up, even with
light loads. Input currents as high as the LM2596 current limit (approx 4.5A) are needed for at least 2 ms or
more, until the output reaches its nominal output voltage. The actual time depends on the output voltage and the
size of the output capacitor. Input power sources that are current limited or sources that can not deliver these
currents without getting loaded down, may not work correctly. Because of the relatively high startup currents
required by the inverting topology, the delayed startup feature (C1, R1 and R2) shown in Figure 37 is
recommended. By delaying the regulator startup, the input capacitor is allowed to charge up to a higher voltage
before the switcher begins operating. A portion of the high input current needed for startup is now supplied by the
input capacitor (CIN). For severe start up conditions, the input capacitor can be made much larger than normal.
INVERTING REGULATOR SHUTDOWN METHODS
To use the ON /OFF pin in a standard buck configuration is simple, pull it below 1.3V (@25°C, referenced to
ground) to turn regulator ON, pull it above 1.3V to shut the regulator OFF. With the inverting configuration, some
level shifting is required, because the ground pin of the regulator is no longer at ground, but is now setting at the
negative output voltage level. Two different shutdown methods for inverting regulators are shown in Figure 39
and Figure 40.
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