LF155, LF156, LF355, LF356, LF357
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SNOSBH0C –MAY 2000–REVISED MARCH 2013
R1, R4 matched. Linearity 0.1% over 2 decades.
Figure 49. Decades VCO
Figure 50. Isolating Large Capacitive Loads
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Overshoot 6%
ts 10μs
When driving large CL, the VOUT slew rate determined by CL and IOUT(MAX)
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Figure 51. Low Drift Peak Detector
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By adding D1 and Rf, VD1=0 during hold mode. Leakage of D2 provided by feedback path through Rf.
Leakage of circuit is essentially Ib (LF155, LF156) plus capacitor leakage of Cp.
Diode D3 clamps VOUT (A1) to VIN−VD3 to improve speed and to limit reverse bias of D2.
Maximum input frequency should be << ½πRfCD2 where CD2 is the shunt capacitance of D2.
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