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HPC3130APBMQUADFLAT 参数 Datasheet PDF下载

HPC3130APBMQUADFLAT图片预览
型号: HPC3130APBMQUADFLAT
PDF下载: 下载PDF文件 查看货源
内容描述: PCI热插拔控制器 [PCI HOT PLUG CONTROLLER]
分类和应用: 控制器PC
文件页数/大小: 41 页 / 537 K
品牌: TI [ TEXAS INSTRUMENTS ]
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HPC3130A  
PCI HOT PLUG CONTROLLER  
SCPS055 – NOVEMBER 1999  
description  
The Texas Instruments HPC3130A is a peripheral component interconnect (PCI) hot-plug controller, compliant  
with PCI Hot-Plug Specification, Revision 1.0. This device supports hot insertion/removal of up to four hot-plug  
slots on a PCI bus, provides a 64-bit data path in any of the four hot-plug slots, and supports 66-MHz systems  
for two slots.  
The primary function of the HPC3130A is to allow noninterfering hot-plug slot connection/disconnection with  
the other PCI devices on the bus. The HPC3130A provides automatic bus connection sequencing and supports  
a protocol for connection during bus idle conditions. It also supports an interrupt pin to report hot-plug slot  
events. The interrupt event status and enable state are compliant with the Advanced Configuration and Power  
Interface (ACPI) Specification.  
Internal registers may be accessed through either a two-signal serial interface or a generic parallel bus. The  
serial interface slave decoding circuit supports up to eight different controllers or other serial bus devices with  
the same system base. Decoding through the parallel interface supports multiple controllers with external  
chip-select logic. Two double-words of configuration and control registers are provided per slot. As a result, the  
HPC3130A decodes an address range of 32 bytes.  
An advanced complementary metal-oxide semiconductor (CMOS) process provides low system power  
consumption while operating at PCI clock rates up to 66 MHz.  
functional block diagram  
A simplified block diagram of the HPC3130A is provided below. The block diagram illustrates the HPC3130A  
functionality on a per slot basis. The SMODE chip input, not shown, is used for terminal multiplexing of the serial  
and parallel bus slave interfaces.  
SYSTEM INTERFACE  
SLOT INTERFACE  
CS  
PWRON/OFF  
Slot  
Power I/F  
Parallel  
Bus  
Slave  
RD  
WR  
DATA 7–0  
A 4–0  
PWRFAULT  
PWRGOOD  
Interface  
PRSNT1  
PRSNT2  
DETECT  
Card  
Detection  
SDA  
SCL  
ADD 6–0  
Serial Bus  
Slave I/F  
Control  
and  
Status  
Registers  
M66EN  
BUSON  
SYSM66EN  
INTR  
REQ64ON  
REQ64ON  
CLKON  
CBT-Switch  
Control  
PRST  
and  
Slot Reset  
IDLEREQ  
IDLEGNT  
FRAME  
IRDY  
SLOTRST  
SLOTREQ64  
Switch  
Timing  
ATTN0  
ATTN1  
Attention  
Indicators  
SREQ  
SGNT  
PCLK  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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