SNLS051B – MARCH 1999 – REVISED MARCH 2013
DS90C031B LVDS Quad CMOS Differential Line Driver
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FEATURES
>155.5 Mbps (77.7 MHz) switching rates
High impedance LVDS outputs with power-off
±350 mV differential signaling
Ultra low power dissipation
400 ps maximum differential skew (5V, 25°C)
3.5 ns maximum propagation delay
Industrial operating temperature range
Pin compatible with DS26C31, MB571 (PECL)
and 41LG (PECL)
Conforms to ANSI/TIA/EIA-644 LVDS standard
Offered in narrow body SOIC package
Fail-safe logic for floating inputs
DESCRIPTION
The DS90C031B is a quad CMOS differential line
driver designed for applications requiring ultra low
power dissipation and high data rates. The device
supports data rates in excess of 155.5 Mbps (77.7
MHz) and uses Low Voltage Differential Signaling
(LVDS) technology.
The DS90C031B accepts TTL/CMOS input levels and
translates them to low voltage (350 mV) differential
output signals. In addition the driver supports a TRI-
STATE function that may be used to disable the
output stage, disabling the load current, and thus
dropping the device to an ultra low idle power state of
11 mW typical.
In addition, the DS90C031B provides power-off high
impedance LVDS outputs. This feature assures
minimal loading effect on the LVDS bus lines when
V
CC
is not present.
The DS90C031B and companion line receiver
(DS90C032B) provide a new alternative to high
power pseudo-ECL devices for high speed point-to-
point interface applications.
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Connection Diagram
Functional Diagram
Figure 1. Dual-In-Line
See Package Number D (R-PDSO-G16)
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Copyright © 1999–2013, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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