SNLS379C – MAY 1998 – REVISED APRIL 2013
DS34C86T Quad CMOS Differential Line Receiver
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FEATURES
CMOS Design for Low Power
±0.2V Sensitivity Over the Input Common
Mode Voltage Range
Typical Propagation Delays: 19 ns
Typical Input Hysteresis: 60 mV
Inputs Won't Load Line when V
CC
= 0V
Meets the Requirements of EIA Standard RS-
422
TRI-STATE Outputs for System Bus
Compatibility
Available in Surface Mount
Open Input Failsafe Feature, Output High for
Open Input
DESCRIPTION
The DS34C86T is a quad differential line receiver
designed to meet the RS-422, RS-423, and Federal
Standards 1020 and 1030 for balanced and
unbalanced digital data transmission, while retaining
the low power characteristics of CMOS.
The DS34C86T has an input sensitivity of 200 mV
over the common mode input voltage range of ±7V.
Hysteresis is provided to improve noise margin and
discourage output instability for slowly changing input
waveforms.
The DS34C86T features internal pull-up and pull-
down resistors which prevent output oscillation on
unused channels.
Separate enable pins allow independent control of
receiver pairs. The TRI-STATE outputs have 6 mA
source and sink capability. The DS34C86T is pin
compatible with the DS3486.
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Logic Diagram
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
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