SNLS354D – MAY 1998 – REVISED APRIL 2013
DS3486 Quad RS-422, RS-423 Line Receiver
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FEATURES
Four Independent Receivers
TRI-STATE Outputs
Internal Hysteresis
−140
mV (typ)
Fast Propagation Times
−19
ns (typ)
TTL Compatible Outputs
5V Supply
Pin Compatible and Interchangeable with
MC3486
DESCRIPTION
Texas Instruments' quad RS-422, RS-423 receiver
features four independent receivers which comply
with EIA Standards for the electrical characteristics of
balanced/unbalanced voltage digital interface circuits.
Receiver outputs are 74LS compatible, TRI-STATE
structures which are forced to a high impedance state
when the appropriate output control pin reaches a
logic zero condition. A PNP device buffers each
output control pin to assure minimum loading for
either logic one or logic zero inputs. In addition, each
receiver has internal hysteresis circuitry to improve
noise margin and discourage output instability for
slowly changing input waveforms.
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Block and Connection Diagrams
Figure 1. Dual-In-Line Package
Top View
D-16 (SOIC) Package or NFG0016E (PDIP)
Package
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Copyright © 1998–2013, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
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