SNLS382C – JUNE 1998 – REVISED APRIL 2013
Figure 7. Propagation Delay for “LS-Type” Load
(1)
(2)
(3)
Diagram shown for ENABLE low.
S1 and S2 of load circuit are closed except where shown.
Pulse generator for all pulses: Rate
≤
1.0 MHz; Z
O
= 50Ω; t
r
≤
15 ns; t
f
≤
6.0 ns.
Figure 8. Enable and Disable Times for “LS-Type” Load
Truth Table
(1)
ENABLE
L
All Other
Combinations of
Enable Inputs
(1)
Z = TRI-STATE
ENABLE
H
Input
X
V
ID
≥
V
TH
(Max)
V
ID
≤
V
TH
(Min)
Open
Output
Z
H
L
H
TYPICAL APPLICATIONS
Figure 9. Two-Wire Balanced Systems, RS-422
6
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