DRV8860
SLRS065A –SEPTEMBER 2013–REVISED NOVEMBER 2013
www.ti.com
Data Register
The Data register is used to control the status of each of the eight outputs:
DATA REGISTER
D8
D7
D6
D5
D4
D3
D2
D1
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
When any bit is ‘1’, the corresponding output will be active. When any bit is ‘0’, the output will be inactive.
The data register is the default write location for the serial interface. In order to read back data from this register,
the Data Register Readout special command is used.
Fault Register
The Fault register can be read to determine if any channel exist fault condition. OCP is an over current fault and
OL is an open load fault.
FAULT REGISTER
F16
F15
F14
F13
F12
F11
F10
F9
OUT8 OCP
OUT7 OCP
OUT6 OCP
OUT5 OCP
OUT4 OCP
OUT3 OCP
OUT2 OCP
OUT1 OCP
SPACER
F8
F7
F6
F5
F4
F3
F2
F1
OUT8 OL
OUT7 OL
OUT6 OL
OUT5 OL
OUT4 OL
OUT3 OL
OUT2 OL
OUT1 OL
When any fault occurs, nFAULT pin will be driven low and corresponding Fault register bit will be set up as ‘1’.
OCP is a flag indicating over current fault. OL is a flag indicating open load fault.
Fault bits can be reset by two approaches:
1. Special command ‘FAULT RESET’ clear all fault bits.
2. Setting Data register to ON will clear corresponding OL bits.
Setting Data register to OFF will clear corresponding OCP bits.
Control Register
The Control register is used to adjust the Energizing Time and PWM Duty Cycle of outputs:
CONTROL REGISTER
C8
C7
C6
C5
C4
C3
C2
C1
Over All Enable
PWM Duty Cycle control
Energizing Time control
Special command ‘WRITE CONTROL REGISTER’ is used to program control register.
Special command ‘READ CONTROL REGISTER’ is used to read back control register content.
12
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: DRV8860
TI [ TEXAS INSTRUMENTS ]
