SLRS065A – SEPTEMBER 2013 – REVISED NOVEMBER 2013
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
(2) (3)
DRV8860
MIN
Power supply voltage range (VM)
Digital input pin current range (ENABLE, LATCH, CLK, DIN)
Digital output pin voltage range (DOUT, nFAULT)
Digital output pin current (DOUT, nFAULT)
Output voltage range (OUTx)
Output current range (OUTx)
Operating virtual junction temperature range, T
J
Storage temperature range, T
stg
(1)
(2)
(3)
–0.3
0
–0.5
–0.5
–0.3
–40
–60
MAX
40
20
7
7
40
150
150
UNIT
V
mA
V
V
V
A
°C
°C
Internally limited
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
Power dissipation and thermal limits must be observed
Thermal Information
(1)
over operating free-air temperature range (unless otherwise noted)
THERMAL METRIC
Θ
JA
Θ
JC(TOP)
Θ
JB
Ψ
JT
Ψ
JB
(1)
(2)
(3)
(4)
(5)
(6)
Junction-to-ambient thermal resistance
Junction-to-board thermal resistance
(4)
(2)
DRV8860
PW (16 PINS)
103
37.9
48
3
47.4
UNITS
Junction-to-case (top) thermal resistance
(3)
Junction-to-top characterization parameter
(5)
Junction-to-board characterization parameter
(6)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report,
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC standard
test exists, but a close description can be found in the ANSI SEMI standard 30-88.
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
The junction-to-top characterization parameter,
Ψ
JT
, estimates the junction temperature of the device in a real system and is extracted
from the simulation data for obtaining
Θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
The junction-to-board characterization parameter,
Ψ
JB
, estimates the junction temperature of the device in a real system and is
extracted from the simulation data for obtaining
Θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
V
M
I
OUT
T
A
Motor power supply voltage range
Low-side driver current capability
Operating ambient temperature range
–40
8.2
NOM
MAX
38
560
85
UNIT
V
mA
°C
4
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