May 2008
DP83848I PHYTER® - Industrial Temperature
Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
General Description
Features
The DP83848I is a robust fully featured 10/100 single
port Physical Layer device offering low power con-
sumption, including several intelligent power down
states. These low power modes increase overall prod-
uct reliability due to decreased power dissipation. Sup-
porting multiple intelligent power modes allows the
application to use the absolute minimum amount of
power needed for operation. In addition to low power,
the DP83848I is optimized for cable length perfor-
mance far exceeding IEEE specifications.
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Low-power 3.3V, 0.18µm CMOS technology
Low power consumption < 270mW Typical
3.3V MAC Interface
Auto-MDIX for 10/100 Mb/s
Energy Detection Mode
25 MHz clock out
SNI Interface (configurable)
RMII Rev. 1.2 Interface (configurable)
MII Serial Management Interface (MDC and MDIO)
IEEE 802.3u MII
The DP83848I includes a 25MHz clock out. This
means that the application can be designed with a
minimum of external parts, which in turn results in the
lowest possible total cost of the solution.
IEEE 802.3u Auto-Negotiation and Parallel Detection
IEEE 802.3u ENDEC, 10BASE-T transceivers and filters
IEEE 802.3u PCS, 100BASE-TX transceivers and filters
IEEE 1149.1 JTAG
The DP83848I easily interfaces to twisted pair media
via an external transformer and fully supports JTAG
IEEE specification 1149.1 for ease of manufacturing.
Additionally both MII and RMII are supported ensuring
ease and flexibility of design.
Integrated ANSI X3.263 compliant TP-PMD physical sub-
layer with adaptive equalization and Baseline Wander com-
pensation
The DP83848I features integrated sublayers to sup-
port both 10BASE-T and 100BASE-TX Ethernet proto-
cols, which ensures compatibility and interoperability
with all other standards based Ethernet solutions.
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Error-free Operation up to 150 meters
Programmable LED support Link, 10 /100 Mb/s Mode, Activ-
ity, and Collision Detect
The DP83848I is offered in a small form factor (48 pin
LQFP) so that a minimum of board space is needed.
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Single register access for complete PHY status
10/100 Mb/s packet BIST (Built in Self Test)
48-pin LQFP package (7mm) x (7mm)
Applications
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High End Peripheral Devices
Industrial Controls and Factory Automation
General Embedded Applications
System Diagram
10BASE-T
or
DP83848I
10/100 Mb/s
MPU/CPU
MII/RMII/SNI
100BASE-TX
25 MHz
Clock
Source
Status
LEDs
Typical Application
®
PHYTER is a registered trademark of National Semiconductor.
© 2008 National Semiconductor Corporation
www.national.com
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