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DP83848IVVX 参数 Datasheet PDF下载

DP83848IVVX图片预览
型号: DP83848IVVX
PDF下载: 下载PDF文件 查看货源
内容描述: DP83848I PHYTER工业温度单端口10/100 Mb / s以太网物理层收发器 [DP83848I PHYTER Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver]
分类和应用: 以太网局域网(LAN)标准
文件页数/大小: 86 页 / 788 K
品牌: TI [ TEXAS INSTRUMENTS ]
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Signal Name  
AN_EN (LED_ACT/COL)  
AN_1 (LED_SPEED)  
AN_0 (LED_LINK)  
Type  
Pin #  
26  
Description  
S, O, PU  
Auto-Negotiation Enable: When high, this enables Auto-Negoti-  
ation with the capability set by ANO and AN1 pins. When low, this  
puts the part into Forced Mode with the capability set by AN0 and  
AN1 pins.  
27  
28  
AN0 / AN1: These input pins control the forced or advertised op-  
erating mode of the DP83848I according to the following table.  
The value on these pins is set by connecting the input pins to  
GND (0) or VCC (1) through 2.2 kresistors. These pins should  
NEVER be connected directly to GND or VCC.  
The value set at this input is latched into the DP83848I at Hard-  
ware-Reset.  
The float/pull-down status of these pins are latched into the Basic  
Mode Control Register and the Auto_Negotiation Advertisement  
Register during Hardware-Reset.  
The default is 111 since these pins have internal pull-ups.  
AN_EN AN1 AN0  
Forced Mode  
0
0
0
0
0
0
1
1
0
1
0
1
10BASE-T, Half-Duplex  
10BASE-T, Full-Duplex  
100BASE-TX, Half-Duplex  
100BASE-TX, Full-Duplex  
Advertised Mode  
AN_EN AN1 AN0  
1
1
1
0
0
1
0
1
0
10BASE-T, Half/Full-Duplex  
100BASE-TX, Half/Full-Duplex  
10BASE-T Half-Duplex  
100BASE-TX, Half-Duplex  
10BASE-T, Half/Full-Duplex  
100BASE-TX,Half/Full-Duplex  
1
1
1
MII_MODE (RX_DV)  
SNI_MODE (TXD_3)  
S, O, PD  
39  
6
MII MODE SELECT: This strapping option pair determines the  
operating mode of the MAC Data Interface. Default operation (No  
pull-ups) will enable normal MII Mode of operation. Strapping  
MII_MODE high will cause the device to be in RMII or SNI mode  
of operation, determined by the status of the SNI_MODE strap.  
Since the pins include internal pull-downs, the default values are  
0.  
The following table details the configurations:  
MII_MODE SNI_MODE  
MAC Interface  
Mode  
0
1
1
X
0
1
MII Mode  
RMII Mode  
10 Mb SNI Mode  
LED_CFG (CRS)  
S, O, PU  
S, O, PU  
40  
41  
LED CONFIGURATION: This strapping option determines the  
mode of operation of the LED pins. Default is Mode 1. Mode 1 and  
Mode 2 can be controlled via the strap option. All modes are con-  
figurable via register access.  
SeeTable 3 for LED Mode Selection.  
MDIX_EN (RX_ER)  
MDIX ENABLE: Default is to enable MDIX. This strapping option  
disables Auto-MDIX. An external pull-down will disable Auto-  
MDIX mode.  
13  
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