DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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BUFFER
Table 3-11. Ball Characteristics (AAR Package) (continued)
BALL
RESET
REL.
PINCNTL
REGISTER NAME
AND ADDRESS[4]
PINCNTL
DEFAULT
VALUE[5]
BALL
RESET
STATE [9]
MODE
[6]
BALL NUMBER [1]
BALL NAME [2]
SIGNAL NAME [3]
TYPE [7] DSIS [8]
POWER [11]
HYS [12]
TYPE [13]
STATE [10]
AK3
EMAC[0]_MRXD[3]/
EMAC[1]_RGRXCTL
EMAC[0]_MRXD[3]/
EMAC[1]_RGRXCTL
PINCNTL243 /
0x4814 0BC8
0x0004 0000
0x01
I/O
PIN
L
L
DVDD_RGMII
GPMC_A[27]
0x04
0x08
0x10
0x01
O
PIN
PIN
PIN
PIN
GPMC_A[26]
O
GPMC_A[0]
O
AK4
AJ4
AL5
AK5
EMAC[0]_MRXD[4]/
EMAC[0]_RGRXD[3]
EMAC[0]_MRXD[4]/
EMAC[0]_RGRXD[3]
PINCNTL244 /
0x4814 0BCC
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
I/O
L
L
L
L
L
L
L
L
DVDD_RGMII
DVDD_RGMII
DVDD_RGMII
DVDD_RGMII
GPMC_A[1]
0x10
0x01
O
PIN
PIN
EMAC[0]_MRXD[5]/
EMAC[0]_RGTXD[3]
EMAC[0]_MRXD[5]/
EMAC[0]_RGTXD[3]
PINCNTL245 /
0x4814 0BD0
I/O
GPMC_A[2]
0x10
0x01
O
PIN
PIN
EMAC[0]_MRXD[6]/
EMAC[0]_RGTXD[2]
EMAC[0]_MRXD[6]/
EMAC[0]_RGTXD[2]
PINCNTL246 /
0x4814 0BD4
I/O
GPMC_A[3]
0x10
0x01
O
PIN
PIN
EMAC[0]_MRXD[7]/
EMAC[0]_RGTXD[1]
EMAC[0]_MRXD[7]/
EMAC[0]_RGTXD[1]
PINCNTL247 /
0x4814 0BD8
I/O
GPMC_A[4]
0x10
0x20
0x01
O
PIN
1
SPI[2]_SCS[3]
I/O
I/O
AJ2
EMAC[0]_MRXER/
EMAC[0]_RGTXCTL
EMAC[0]_MRXER/
EMAC[0]_RGTXCTL
PINCNTL238 /
0x4814 0BB4
0x000C 0000
0x000C 0000
0
L
L
L
L
DVDD_RGMII
DVDD_RGMII
VIN[1]B_D[3]
EMAC[0]_RMRXER
GP3[26]
0x02
0x04
0x80
0x01
I
PIN
0
I
I/O
I/O
PIN
0
AG4
EMAC[0]_MTCLK/
EMAC[0]_RGRXC
EMAC[0]_MTCLK/
EMAC[0]_RGRXC
PINCNTL235 /
0x4814 0BA8
VIN[1]B_D[0]
SPI[3]_SCS[3]
I2C[2]_SDA
GP3[23]
0x02
0x20
0x40
0x80
0x01
I
PIN
1
I/O
I/O
I/O
I/O
1
PIN
PIN
AK6
EMAC[0]_MTXD[0]/
EMAC[1]_RGRXD[3]
EMAC[0]_MTXD[0]/
EMAC[1]_RGRXD[3]
PINCNTL250 /
0x4814 0BE4
0x0004 0000
L
L
DVDD_RGMII
GPMC_A[7]
SPI[2]_D[0]
0x10
0x20
0x01
O
PIN
PIN
PIN
I/O
I/O
AJ7
AK7
EMAC[0]_MTXD[1]/
EMAC[1]_RGTXD[1]
EMAC[0]_MTXD[1]/
EMAC[1]_RGTXD[1]
PINCNTL251 /
0x4814 0BE8
0x0004 0000
0x0004 0000
L
L
L
L
DVDD_RGMII
DVDD_RGMII
GPMC_A[8]
0x10
0x01
O
PIN
PIN
EMAC[0]_MTXD[2]/
EMAC[1]_RGTXCTL
EMAC[0]_MTXD[2]/
EMAC[1]_RGTXCTL
PINCNTL252 /
0x4814 0BEC
I/O
EMAC[1]_RMRXD[0]
GPMC_A[9]
0x02
0x10
I
PIN
PIN
O
40
Device Pins
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