DM385, DM388
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SPRS821D –MARCH 2013–REVISED DECEMBER 2013
Table 3-11. Ball Characteristics (AAR Package) (continued)
BALL
RESET
REL.
PINCNTL
REGISTER NAME
AND ADDRESS[4]
PINCNTL
DEFAULT
VALUE[5]
BALL
RESET
STATE [9]
MODE
[6]
BUFFER
TYPE [13]
BALL NUMBER [1]
BALL NAME [2]
SIGNAL NAME [3]
TYPE [7] DSIS [8]
POWER [11]
HYS [12]
STATE [10]
AL6
EMAC[0]_GMTCLK/
EMAC[1]_RGRXC
EMAC[0]_GMTCLK/
EMAC[1]_RGRXC
PINCNTL249 /
0x4814 0BE0
0x0004 0000
0x000C 0000
0x01
I/O
PIN
L
L
DVDD_RGMII
GPMC_A[6]
0x10
0x20
0x01
O
I/O
I
PIN
PIN
0
SPI[2]_D[1]
AH1
AH2
AK1
EMAC[0]_MCOL/
EMAC[0]_RGRXCTL
EMAC[0]_MCOL/
EMAC[0]_RGRXCTL
PINCNTL236 /
0x4814 0BAC
L
L
L
L
DVDD_RGMII
DVDD_RGMII
DVDD_RGMII
VIN[1]B_D[1]
EMAC[0]_RMRXD[0]
GP3[24]
0x02
0x04
0x80
0x01
I
PIN
PIN
PIN
0
I
I/O
I
EMAC[0]_MCRS/
EMAC[0]_RGRXD[2]
EMAC[0]_MCRS/
EMAC[0]_RGRXD[2]
PINCNTL237 /
0x4814 0BB0
0x000C 0000
0x000C 0000
L
L
VIN[1]B_D[2]
EMAC[0]_RMRXD[1]
GP3[25]
0x02
0x04
0x80
0x01
I
PIN
PIN
PIN
0
I
I/O
I/O
EMAC[0]_MRCLK/
EMAC[0]_RGTXC
EMAC[0]_MRCLK/
EMAC[0]_RGTXC
PINCNTL239 /
0x4814 0BB8
VIN[1]B_D[4]
EMAC[0]_RMCRSDV
SPI[3]_SCS[2]
GP3[27]
0x02
0x04
0x20
0x80
0x01
I
PIN
0
I
I/O
I/O
I/O
1
PIN
0
AJ6
AK2
EMAC[0]_MRXDV/
EMAC[1]_RGRXD[1]
EMAC[0]_MRXDV/
EMAC[1]_RGRXD[1]
PINCNTL248 /
0x4814 0BDC
0x0004 0000
0x0004 0000
L
L
L
L
DVDD_RGMII
DVDD_RGMII
GPMC_A[5]
0x10
0x20
0x01
O
PIN
1
SPI[2]_SCLK
I/O
I/O
EMAC[0]_MRXD[0]/
EMAC[0]_RGTXD[0]
EMAC[0]_MRXD[0]/
EMAC[0]_RGTXD[0]
PINCNTL240 /
0x4814 0BBC
PIN
VIN[1]B_D[5]
EMAC[0]_RMTXD[0]
GP3[28]
0x02
0x04
0x80
0x01
I
PIN
PIN
PIN
PIN
O
I/O
I/O
AL2
AL3
EMAC[0]_MRXD[1]/
EMAC[0]_RGRXD[0]
EMAC[0]_MRXD[1]/
EMAC[0]_RGRXD[0]
PINCNTL241 /
0x4814 0BC0
0x0004 0000
0x0004 0000
L
L
L
L
DVDD_RGMII
DVDD_RGMII
VIN[1]B_D[6]
EMAC[0]_RMTXD[1]
GP3[29]
0x02
0x04
0x80
0x01
I
PIN
PIN
PIN
PIN
O
I/O
I/O
EMAC[0]_MRXD[2]/
EMAC[0]_RGRXD[1]
EMAC[0]_MRXD[2]/
EMAC[0]_RGRXD[1]
PINCNTL242 /
0x4814 0BC4
VIN[1]B_D[7]
EMAC[0]_RMTXEN
GP3[30]
0x02
0x04
0x80
I
PIN
PIN
PIN
O
I/O
Copyright © 2013, Texas Instruments Incorporated
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